/freebsd/bin/chmod/tests/ |
H A D | chmod_test.sh | 164 atf_check -o file:output.txt chmod -vv 0700 foo bar 165 atf_check chmod -vv 0700 foo bar
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/freebsd/bin/sh/tests/expansion/ |
H A D | export1.0 | 2 w='@ vv=6' 4 v=0 vv=0 7 [ "$vv" = "6" ] || echo "Expected 6 got $vv"
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/freebsd/contrib/bmake/ |
H A D | os.sh | 265 eval vv=\$$v 266 echo "$v='$vv'"
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/freebsd/contrib/bzip2/ |
H A D | blocksort.c | 843 Int32 vv; in mainSort() local 849 vv = runningOrder[i]; in mainSort() 851 while ( BIGFREQ(runningOrder[j-h]) > BIGFREQ(vv) ) { in mainSort() 857 runningOrder[j] = vv; in mainSort()
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/freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
H A D | Builtins.def | 572 BUILTIN(__builtin_bzero, "vv*z", "nF") 573 BUILTIN(__builtin_free, "vv*", "nF") 578 BUILTIN(__builtin_memcpy_inline, "vv*vC*Iz", "n") 582 BUILTIN(__builtin_memset_inline, "vv*iIz", "n") 616 BUILTIN(__builtin_longjmp, "vv**i", "r") 641 BUILTIN(__builtin_init_dwarf_reg_size_table, "vv*", "n") 1090 LIBBUILTIN(free, "vv*", "f", STDLIB_H, ALL_LANGUAGES) 1193 LIBBUILTIN(bzero, "vv*z", "f", STRINGS_H, ALL_GNU_LANGUAGES) 1691 BUILTIN(__builtin_operator_delete, "vv*", "tnE") 1712 LANGBUILTIN(__builtin_coro_resume, "vv*", "", COR_LANG) [all …]
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H A D | BuiltinsAArch64.def | 29 BUILTIN(__clear_cache, "vv*v*", "i") 68 TARGET_BUILTIN(__builtin_arm_stg, "vv*", "t", "mte") 132 TARGET_BUILTIN(__builtin_arm_st64b, "vv*WUiC*", "n", "ls64") 289 TARGET_HEADER_BUILTIN(__prefetch, "vv*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "")
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H A D | BuiltinsARM.def | 29 BUILTIN(__clear_cache, "vv*v*", "i")
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H A D | BuiltinsHexagon.def | 101 TARGET_BUILTIN(__builtin_HEXAGON_S2_storerb_pci, "vv*IiiivC*", "", V5) 102 TARGET_BUILTIN(__builtin_HEXAGON_S2_storerh_pci, "vv*IiiivC*", "", V5) 103 TARGET_BUILTIN(__builtin_HEXAGON_S2_storerf_pci, "vv*IiiivC*", "", V5) 104 TARGET_BUILTIN(__builtin_HEXAGON_S2_storeri_pci, "vv*IiiivC*", "", V5) 105 TARGET_BUILTIN(__builtin_HEXAGON_S2_storerd_pci, "vv*IiiLLivC*", "", V5) 106 TARGET_BUILTIN(__builtin_HEXAGON_S2_storerb_pcr, "vv*iivC*", "", V5) 107 TARGET_BUILTIN(__builtin_HEXAGON_S2_storerh_pcr, "vv*iivC*", "", V5) 108 TARGET_BUILTIN(__builtin_HEXAGON_S2_storerf_pcr, "vv*iivC*", "", V5) 109 TARGET_BUILTIN(__builtin_HEXAGON_S2_storeri_pcr, "vv*iivC*", "", V5) 110 TARGET_BUILTIN(__builtin_HEXAGON_S2_storerd_pcr, "vv*iLLivC*", "", V5) [all …]
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H A D | BuiltinsHexagonDep.def | 852 TARGET_BUILTIN(__builtin_HEXAGON_Y2_dccleana, "vv*", "", V5) 853 TARGET_BUILTIN(__builtin_HEXAGON_Y2_dccleaninva, "vv*", "", V5) 854 TARGET_BUILTIN(__builtin_HEXAGON_Y2_dcfetch, "vv*", "", V5) 855 TARGET_BUILTIN(__builtin_HEXAGON_Y2_dcinva, "vv*", "", V5) 856 TARGET_BUILTIN(__builtin_HEXAGON_Y2_dczeroa, "vv*", "", V5) 857 TARGET_BUILTIN(__builtin_HEXAGON_Y4_l2fetch, "vv*i", "", V5) 858 TARGET_BUILTIN(__builtin_HEXAGON_Y5_l2fetch, "vv*LLi", "", V5) 927 TARGET_BUILTIN(__builtin_HEXAGON_Y6_dmlink, "vv*v*", "", V68) 930 TARGET_BUILTIN(__builtin_HEXAGON_Y6_dmresume, "vv*", "", V68) 931 TARGET_BUILTIN(__builtin_HEXAGON_Y6_dmstart, "vv*", "", V68) [all …]
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H A D | BuiltinsNVPTX.def | 1030 TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_4, "vv*3vC*1.", "", AND(SM_80,PTX70)) 1031 TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_8, "vv*3vC*1.", "", AND(SM_80,PTX70)) 1032 TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_16, "vv*3vC*1.", "", AND(SM_80,PTX70)) 1033 TARGET_BUILTIN(__nvvm_cp_async_cg_shared_global_16, "vv*3vC*1.", "", AND(SM_80,PTX70))
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H A D | BuiltinsPPC.def | 64 BUILTIN(__builtin_ppc_dcbt, "vv*", "") 65 BUILTIN(__builtin_ppc_dcbtst, "vv*", "") 66 BUILTIN(__builtin_ppc_dcbz, "vv*", "") 67 TARGET_BUILTIN(__builtin_ppc_icbt, "vv*", "", "isa-v207-instructions") 172 BUILTIN(__builtin_ppc_dcbtstt, "vv*", "") 173 BUILTIN(__builtin_ppc_dcbtt, "vv*", "") 986 CUSTOM_BUILTIN(mma_disassemble_pair, vsx_disassemble_pair, "vv*W256*", false, 1003 UNALIASED_CUSTOM_BUILTIN(vsx_disassemble_pair, "vv*W256*", false, 1009 UNALIASED_CUSTOM_BUILTIN(mma_disassemble_acc, "vv*W512*", false,
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H A D | BuiltinsX86.def | 646 TARGET_BUILTIN(__builtin_ia32_fxrstor, "vv*", "n", "fxsr") 647 TARGET_BUILTIN(__builtin_ia32_fxsave, "vv*", "n", "fxsr") 650 TARGET_BUILTIN(__builtin_ia32_xsave, "vv*UOi", "n", "xsave") 651 TARGET_BUILTIN(__builtin_ia32_xrstor, "vv*UOi", "n", "xsave") 658 TARGET_BUILTIN(__builtin_ia32_xsavec, "vv*UOi", "n", "xsavec") 659 TARGET_BUILTIN(__builtin_ia32_xsaves, "vv*UOi", "n", "xsaves") 665 TARGET_BUILTIN(__builtin_ia32_rstorssp, "vv*", "n", "shstk") 669 TARGET_BUILTIN(__builtin_ia32_clrssbsy, "vv*", "n", "shstk") 707 TARGET_BUILTIN(__builtin_ia32_llwpcb, "vv*", "n", "lwp") 2044 TARGET_BUILTIN(__builtin_ia32_clzero, "vv*", "n", "clzero") [all …]
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H A D | BuiltinsX86_64.def | 57 TARGET_BUILTIN(__builtin_ia32_fxrstor64, "vv*", "n", "fxsr") 58 TARGET_BUILTIN(__builtin_ia32_fxsave64, "vv*", "n", "fxsr") 59 TARGET_BUILTIN(__builtin_ia32_xsave64, "vv*UOi", "n", "xsave") 60 TARGET_BUILTIN(__builtin_ia32_xrstor64, "vv*UOi", "n", "xsave") 62 TARGET_BUILTIN(__builtin_ia32_xrstors64, "vv*UOi", "n", "xsaves") 63 TARGET_BUILTIN(__builtin_ia32_xsavec64, "vv*UOi", "n", "xsavec") 64 TARGET_BUILTIN(__builtin_ia32_xsaves64, "vv*UOi", "n", "xsaves") 153 TARGET_BUILTIN(__builtin_ia32_aadd64, "vv*SOi", "n", "raoint") 154 TARGET_BUILTIN(__builtin_ia32_aand64, "vv*SOi", "n", "raoint") 155 TARGET_BUILTIN(__builtin_ia32_aor64, "vv*SOi", "n", "raoint") [all …]
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H A D | arm_sve.td | 1155 def SVSETFFR : SInst<"svsetffr", "vv", "", MergeNone, "", [IsOverloadNone]>;
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H A D | riscv_sifive_vector.td | 141 defm sf_vqmaccu_2x8x2 : RVVVQMACCDODBuiltinSet<[["", "v", "vv(FixedSEW:8)SUv(FixedSEW:8)Uv"]]>; 142 defm sf_vqmacc_2x8x2 : RVVVQMACCDODBuiltinSet<[["", "v", "vv(FixedSEW:8)Sv(FixedSEW:8)v"]]>; 143 defm sf_vqmaccus_2x8x2 : RVVVQMACCDODBuiltinSet<[["", "v", "vv(FixedSEW:8)SUv(FixedSEW:8)v"]]>; 144 defm sf_vqmaccsu_2x8x2 : RVVVQMACCDODBuiltinSet<[["", "v", "vv(FixedSEW:8)Sv(FixedSEW:8)Uv"]]>;
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H A D | riscv_vector.td | 335 string S = !cond(!eq(nf, 2): !if(signed, "vv", "UvUv"), 399 def : RVVBuiltin<"v", "vv", type_range>; 436 def : RVVBuiltin<"v", "vv", type_range>; 487 def : RVVBuiltin<"v", "vv", type_range>; 1274 [["vv", "v", "vvUv"], 1287 [["vv", "w", "wvv"], 1347 [["v", "v", "vv"]]>; 1350 [["v", "v", "vv"]]>; 2199 [["vv", "v", "vvUv"]]>; 2203 [["vv", "v", "vv(Log2EEW:4)Uv"]]>; [all …]
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H A D | riscv_vector_common.td | 333 [["vv", "v", "vvv"], 338 [["vv", "v", "vvvu"], 357 [["vv", "v", "vvv"], 370 [["vv", "v", "vvUv"], 431 [["vv", "vm", "mvv"], 487 [["vv", "v", "vvv"], 492 [["vv", "v", "vvvu"], 505 [["vv", "vm", "mvv"], 677 [["vv", "w", "wvv"], 697 [["vv", "w", "wvv"], [all …]
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/freebsd/contrib/llvm-project/compiler-rt/lib/tsan/rtl/ |
H A D | tsan_rtl_access.cpp | 538 m128 vv = _mm_setr_epi32( in ShadowSet() local 543 for (; vp < vend; vp++) _mm_store_si128(vp, vv); in ShadowSet()
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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | IntrinsicsRISCVXsf.td | 118 …def "int_riscv_sf_vc_v_" # t # "vv" : RISCVSFCustomVC_XVV<HasDst=1, HasSE=0, ImmScalar=ImmScala…
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoV.td | 677 def V : VALUVV<funct6, OPFVV, opcodestr # ".vv">, 689 def V : VALUVV<funct6, OPFVV, opcodestr # ".vv">, 702 def V : VALUVV<funct6, OPFVV, opcodestr # ".vv">, 707 def V : VALUVV<funct6, OPFVV, opcodestr # ".vv">, 744 def V : VALUVV<funct6, OPFVV, opcodestr # ".vv">, 1204 def : InstAlias<"vmsgtu.vv $vd, $va, $vb$vm", 1206 def : InstAlias<"vmsgt.vv $vd, $va, $vb$vm", 1208 def : InstAlias<"vmsgeu.vv $vd, $va, $vb$vm", 1210 def : InstAlias<"vmsge.vv $vd, $va, $vb$vm", 1439 def : InstAlias<"vmfgt.vv $vd, $va, $vb$vm", [all …]
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H A D | RISCVInstrInfoVPseudos.td | 6221 // Match vrsub with 2 vector operands to vsub.vv by swapping operands. This 7087 // vsmul.vv and vsmul.vx are not included in EEW=64 in Zve64*.
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H A D | RISCVInstrInfoVVLPatterns.td | 2228 // vsmul.vv and vsmul.vx are not included in EEW=64 in Zve64*.
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H A D | RISCVInstrInfoXSf.td | 190 defm VV : CustomSiFiveVCIX<"vv", VCIX_XV, uimm5, VR, VR>, Sched<[]>; 625 defm : VPatVC_XV<"vv", "VV", vti, vti.Vector, vti.RegClass>;
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H A D | RISCVInstrInfoXTHead.td | 245 def _VV : THVdotALUrVV<funct6, OPMVX, opcodestr # ".vv", EarlyClobber=1>;
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H A D | RISCVInstrInfoZvk.td | 36 def V : VALUVV<funct6, OPMVV, opcodestr # "." # "vv">, 95 def NAME # _VV : PALUVs2NoVm<funct6_vv, vs1, opv, opcodestr # ".vv">; 135 def VGHSH_VV : PALUVVNoVm<0b101100, OPMVV, "vghsh.vv">; 136 def VGMUL_VV : PALUVs2NoVm<0b101000, 0b10001, OPMVV, "vgmul.vv">; 140 def VSHA2CH_VV : PALUVVNoVm<0b101110, OPMVV, "vsha2ch.vv">; 141 def VSHA2CL_VV : PALUVVNoVm<0b101111, OPMVV, "vsha2cl.vv">; 142 def VSHA2MS_VV : PALUVVNoVm<0b101101, OPMVV, "vsha2ms.vv">; 162 def VSM3ME_VV : PALUVVNoVm<0b100000, OPMVV, "vsm3me.vv">;
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