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Searched refs:o3_tready (Results 1 – 19 of 19) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/fifo/
H A Daxi_demux8.v21 output [WIDTH-1:0] o3_tdata, output o3_tlast, output o3_tvalid, input o3_tready, port
40 .o3_tdata(), .o3_tlast(), .o3_tvalid(), .o3_tready(1'b0)
50 .o3_tdata(o3_tdata), .o3_tlast(o3_tlast), .o3_tvalid(o3_tvalid), .o3_tready(o3_tready)
60 .o3_tdata(o7_tdata), .o3_tlast(o7_tlast), .o3_tvalid(o7_tvalid), .o3_tready(o7_tready)
H A Daxi_demux4.v20 output [WIDTH-1:0] o3_tdata, output o3_tlast, output o3_tvalid, input o3_tready); port
73 … assign i_tready_int = |(dm_state & ({o3_tready, o2_tready, o1_tready, o0_tready} | ~ACTIVE_CHAN));
H A Daxi_loopback.v46 .o3_tdata(), .o3_tlast(), .o3_tvalid(), .o3_tready(1'b1));
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/vita_200/
H A Dchdr_xxxx_to_16sc_chain.v51 wire [63:0] o3_tdata; wire o3_tlast, o3_tvalid, o3_tready; net
83 .o_tdata(o3_tdata), .o_tlast(o3_tlast), .o_tvalid(o3_tvalid), .o_tready(o3_tready)
99 .o3_tdata(i3_tdata), .o3_tlast(i3_tlast), .o3_tvalid(i3_tvalid), .o3_tready(i3_tready));
106 .i3_tdata(o3_tdata), .i3_tlast(o3_tlast), .i3_tvalid(o3_tvalid), .i3_tready(o3_tready),
H A Dchdr_16sc_to_xxxx_chain.v50 wire [63:0] o3_tdata; wire o3_tlast, o3_tvalid, o3_tready; net
81 .o_tdata(o3_tdata), .o_tlast(o3_tlast), .o_tvalid(o3_tvalid), .o_tready(o3_tready)
97 .o3_tdata(i3_tdata), .o3_tlast(i3_tlast), .o3_tvalid(i3_tvalid), .o3_tready(i3_tready));
104 .i3_tdata(o3_tdata), .i3_tlast(o3_tlast), .i3_tvalid(o3_tvalid), .i3_tready(o3_tready),
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/rfnoc/
H A Dsplit_stream.v16 output [WIDTH-1:0] o3_tdata, output o3_tlast, output o3_tvalid, input o3_tready); port
27 assign i_tready = ~|(~{o3_tready,o2_tready,o1_tready,o0_tready} & ACTIVE_MASK);
H A Dsplit_stream_fifo.v17 output [WIDTH-1:0] o3_tdata, output o3_tlast, output o3_tvalid, input o3_tready); port
30 ….o3_tdata(o3_tdata_int), .o3_tlast(o3_tlast_int), .o3_tvalid(o3_tvalid_int), .o3_tready(o3_tready_…
55 .o_tdata({o3_tlast, o3_tdata}), .o_tvalid(o3_tvalid), .o_tready(o3_tready),
H A Dcomplex_invert.v42 .o3_tdata(), .o3_tlast(), .o3_tvalid(), .o3_tready(1'b0));
79 .o3_tdata(), .o3_tlast(), .o3_tvalid(), .o3_tready(1'b0));
H A Daddsub.vhd67 o3_tready : in std_ulogic); port in addsub_vhdl.rtl.split_stream_fifo
137 o3_tready => '1');
H A Daddsub.v39 .o2_tready(1'b1), .o3_tready(1'b1));
H A Ddds_timed.v79 .o2_tready(1'b0), .o3_tready(1'b0));
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_window/
H A Dwindow.v98 .o3_tready (1'b0)
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/io_port2/
H A Dpcie_iop2_msg_arbiter.v129 … .o3_tdata(e3_regi_tdata), .o3_tlast(), .o3_tvalid(e3_regi_tvalid), .o3_tready(e3_regi_tready)
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/b200/
H A Db200_core.v157 ….o3_tdata(l0_ctrl_tdata), .o3_tlast(l0_ctrl_tlast), .o3_tvalid(l0_ctrl_tvalid), .o3_tready(l0_ctrl…
293 .o3_tdata(), .o3_tlast(), .o3_tvalid(), .o3_tready(1'b1));
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/b2xxmini/
H A Db205_core.v141 .o3_tdata(), .o3_tlast(), .o3_tvalid(), .o3_tready(1'b1)
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/
H A Dx300_pcie_int.v343 …3)), .o3_tlast(dmarx_tlast_bclk[3]), .o3_tvalid(dmarx_tvalid_bclk[3]), .o3_tready(dmarx_tready_bcl…
H A Dbus_int.v686 .o3_tdata(), .o3_tlast(), .o3_tvalid(), .o3_tready(1'b1));
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/radio_200/
H A Dradio_legacy.v315 ….o3_tdata(), .o3_tlast(), .o3_tvalid(), .o3_tready(1'b0)); …
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/axi/
H A Daxi_dma_fifo.v348 .o3_tdata(), .o3_tlast(), .o3_tvalid(), .o3_tready(1'b0)