b54a9a56 | 26-Feb-2024 |
Sergey Kambalin <serg.oker@gmail.com> |
hw/gpio: Connect SD controller to BCM2838 GPIO
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240226000259.2752893-9-
hw/gpio: Connect SD controller to BCM2838 GPIO
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240226000259.2752893-9-sergey.kambalin@auriga.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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0c8b40db | 26-Feb-2024 |
Sergey Kambalin <serg.oker@gmail.com> |
hw/gpio: Implement BCM2838 GPIO functionality
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240226000259.2752893-8-s
hw/gpio: Implement BCM2838 GPIO functionality
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240226000259.2752893-8-sergey.kambalin@auriga.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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bb3d1c61 | 09-Jan-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP2_GPIO type name
Following docs/devel/style.rst guidelines, rename omap2_gpif_s -> Omap2GpioState. This also remove a use of 'struct' in the DECLARE_INS
hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP2_GPIO type name
Following docs/devel/style.rst guidelines, rename omap2_gpif_s -> Omap2GpioState. This also remove a use of 'struct' in the DECLARE_INSTANCE_CHECKER() macro call.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230109140306.23161-6-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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bbcdf7d0 | 09-Jan-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP1_GPIO type name
Following docs/devel/style.rst guidelines, rename omap_gpif_s -> Omap1GpioState. This also remove a use of 'struct' in the DECLARE_INST
hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP1_GPIO type name
Following docs/devel/style.rst guidelines, rename omap_gpif_s -> Omap1GpioState. This also remove a use of 'struct' in the DECLARE_INSTANCE_CHECKER() macro call.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230109140306.23161-5-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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554c2945 | 25-May-2022 |
Jamin Lin <jamin_lin@aspeedtech.com> |
hw/gpio: replace HWADDR_PRIx with PRIx64
1. replace HWADDR_PRIx with PRIx64 2. fix indent issue
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Mess
hw/gpio: replace HWADDR_PRIx with PRIx64
1. replace HWADDR_PRIx with PRIx64 2. fix indent issue
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220525053444.27228-5-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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247c0029 | 25-May-2022 |
Jamin Lin <jamin_lin@aspeedtech.com> |
hw/gpio support GPIO index mode for write operation.
It did not support GPIO index mode for read operation.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@ka
hw/gpio support GPIO index mode for write operation.
It did not support GPIO index mode for read operation.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220525053444.27228-4-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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17075ef2 | 25-May-2022 |
Jamin Lin <jamin_lin@aspeedtech.com> |
hw/gpio: Add ASPEED GPIO model for AST1030
AST1030 integrates one set of Parallel GPIO Controller with maximum 151 control pins, which are 21 groups (A~U, exclude pin: M6 M7 Q5 Q6 Q7 R0 R1 R4 R5 R6
hw/gpio: Add ASPEED GPIO model for AST1030
AST1030 integrates one set of Parallel GPIO Controller with maximum 151 control pins, which are 21 groups (A~U, exclude pin: M6 M7 Q5 Q6 Q7 R0 R1 R4 R5 R6 R7 S0 S3 S4 S5 S6 S7 ) and the group T and U are input only.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220525053444.27228-3-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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