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Searched refs:OS_DELAY (Results 1 – 25 of 44) sorted by relevance

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/dragonfly/sys/dev/netif/ath/ath_hal/ar5210/
H A Dar5210_reset.c252 OS_DELAY(1000); /* Wait a bit (1 msec) */ in ar5210Reset()
378 OS_DELAY(1000); in ar5210Disable()
411 OS_DELAY(1000); in ar5210ChipReset()
470 OS_DELAY(4000); in ar5210PerCalibrationN()
475 OS_DELAY(10); in ar5210PerCalibrationN()
482 OS_DELAY(1000); in ar5210PerCalibrationN()
514 OS_DELAY(20); in ar5210PerCalibrationN()
529 OS_DELAY(1000); in ar5210PerCalibrationN()
553 OS_DELAY(5000); in ar5210PerCalibrationN()
594 OS_DELAY(delay); in ar5210SetResetReg()
[all …]
H A Dar5210_power.c57 OS_DELAY(2000); /* Give chip the chance to awake */ in ar5210SetPowerModeAwake()
63 OS_DELAY(200); in ar5210SetPowerModeAwake()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5416/
H A Dar5416_power.c61 OS_DELAY(10000); in ar5416SetPowerModeAwake()
63 OS_DELAY(50); /* Give chip the chance to awake */ in ar5416SetPowerModeAwake()
69 OS_DELAY(50); in ar5416SetPowerModeAwake()
H A Dar5416_reset.c546 OS_DELAY(synthDelay + BASE_ACTIVATE_DELAY);
652 OS_DELAY((synthDelay << 1) + BASE_ACTIVATE_DELAY); in ar5416InitBB()
654 OS_DELAY((synthDelay << 2) + BASE_ACTIVATE_DELAY); in ar5416InitBB()
656 OS_DELAY(synthDelay + BASE_ACTIVATE_DELAY); in ar5416InitBB()
1325 OS_DELAY(20); in ar5416SetResetPowerOn()
1397 OS_DELAY(10000); in ar5416SetReset()
1399 OS_DELAY(100); in ar5416SetReset()
1415 OS_DELAY(50); in ar5416SetReset()
1523 OS_DELAY(RTC_PLL_SETTLE_DELAY); in ar5416InitPLL()
1723 OS_DELAY(100); in ar5416SetBoardValues()
H A Dar5416_misc.c155 OS_DELAY(10); in ar5416SetTsf64()
178 OS_DELAY(10); in ar5416ResetTsf()
/dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_mci.c109 OS_DELAY(1); in ar9300_mci_reset_req_wakeup()
142 OS_DELAY(10); in ar9300_mci_wait_for_interrupt()
169 OS_DELAY(5); in ar9300_mci_remote_reset()
185 OS_DELAY(5); in ar9300_mci_send_req_wake()
461 OS_DELAY(10); in ar9300_mci_mute_bt()
470 OS_DELAY(5); in ar9300_mci_mute_bt()
772 OS_DELAY(252); in ar9300_mci_prep_interface()
815 OS_DELAY(10); in ar9300_mci_prep_interface()
1064 OS_DELAY(1); in ar9300_mci_reset()
1070 OS_DELAY(100); in ar9300_mci_reset()
[all …]
H A Dar9300_xmit.c619 OS_DELAY(AH_TIME_QUANTUM); /* XXX get actual value */ in ar9300_stop_tx_dma()
673 OS_DELAY(200); in ar9300_stop_tx_dma()
686 OS_DELAY(AH_TIME_QUANTUM); in ar9300_stop_tx_dma()
724 OS_DELAY(AH_TIME_QUANTUM); /* XXX get actual value */ in ar9300_stop_tx_dma_indv_que()
778 OS_DELAY(200); in ar9300_stop_tx_dma_indv_que()
791 OS_DELAY(AH_TIME_QUANTUM); in ar9300_stop_tx_dma_indv_que()
876 OS_DELAY(AR9300_ABORT_WAIT); in ar9300_abort_tx_dma()
894 OS_DELAY(AR9300_ABORT_WAIT); in ar9300_abort_tx_dma()
H A Dar9300_reset.c1794 OS_DELAY(10); in ar9300_set_reset()
1805 OS_DELAY(10); in ar9300_set_reset()
1818 OS_DELAY(10); in ar9300_set_reset()
1820 OS_DELAY(10); in ar9300_set_reset()
1822 OS_DELAY(10); in ar9300_set_reset()
1824 OS_DELAY(10); in ar9300_set_reset()
1873 OS_DELAY(2); in ar9300_set_reset_power_on()
3020 OS_DELAY(200); in ar9300_process_ini()
3028 OS_DELAY(1); in ar9300_process_ini()
3036 OS_DELAY(200); in ar9300_process_ini()
[all …]
H A Dar9300_power.c503 OS_DELAY(10); /* delay to allow the write to take effect. */ in ar9300_set_power_mode_awake()
516 OS_DELAY(50); in ar9300_set_power_mode_awake()
523 OS_DELAY(50); in ar9300_set_power_mode_awake()
558 OS_DELAY(100); in ar9300_set_power_mode_sleep()
569 OS_DELAY(100); in ar9300_set_power_mode_sleep()
576 OS_DELAY(2); in ar9300_set_power_mode_sleep()
633 OS_DELAY(30); in ar9300_set_power_mode_network_sleep()
817 OS_DELAY(1000); in ar9280_config_ser_des__wow_sleep()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5312/
H A Dar5312_reset.c440 OS_DELAY((synthDelay << 1) + BASE_ACTIVATE_DELAY); in ar5312Reset()
442 OS_DELAY((synthDelay << 2) + BASE_ACTIVATE_DELAY); in ar5312Reset()
444 OS_DELAY(synthDelay + BASE_ACTIVATE_DELAY); in ar5312Reset()
456 (OS_REG_READ(ah, 0x9c24) & 0x10)) /* test if baseband not ready */ OS_DELAY(200); in ar5312Reset()
715 OS_DELAY(PLL_SETTLE_DELAY); in ar5312ChipReset()
721 OS_DELAY(PLL_SETTLE_DELAY); in ar5312ChipReset()
814 OS_DELAY(100); in ar5312MacReset()
871 OS_DELAY(100); in ar5312MacReset()
H A Dar5312_attach.c217 OS_DELAY(2000); in ar5312Attach()
222 OS_DELAY(2000); in ar5312Attach()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5211/
H A Dar5211_power.c46 OS_DELAY(10); /* Give chip the chance to awake */ in ar5211SetPowerModeAwake()
52 OS_DELAY(200); in ar5211SetPowerModeAwake()
H A Dar5211_attach.c257 OS_DELAY(1000); in ar5211Attach()
289 OS_DELAY(2000); in ar5211Attach()
319 OS_DELAY(2000); in ar5211Attach()
324 OS_DELAY(2000); in ar5211Attach()
425 OS_DELAY(100); in ar5211ChipTest()
H A Dar5211_reset.c460 OS_DELAY(synthDelay + DELAY_BASE_ACTIVATE); in ar5211Reset()
580 OS_DELAY(2100); /* 8245 @ 96Mhz hangs with 2000us. */ in ar5211Disable()
609 OS_DELAY(DELAY_PLL_SETTLE); in ar5211ChipReset()
612 OS_DELAY(DELAY_PLL_SETTLE); in ar5211ChipReset()
626 OS_DELAY(2100); /* 8245 @ 96Mhz hangs with 2000us. */ in ar5211ChipReset()
721 OS_DELAY(5000); in ar5211PerCalibrationN()
760 OS_DELAY(15); in ar5211SetResetReg()
873 OS_DELAY(searchTime); in ar5211RunNoiseFloor()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5212/
H A Dar5212_power.c66 OS_DELAY(10); /* Give chip the chance to awake */ in ar5212SetPowerModeAwake()
72 OS_DELAY(50); in ar5212SetPowerModeAwake()
H A Dar5212_reset.c516 OS_DELAY((synthDelay << 1) + BASE_ACTIVATE_DELAY); in ar5212Reset()
518 OS_DELAY((synthDelay << 2) + BASE_ACTIVATE_DELAY); in ar5212Reset()
520 OS_DELAY(synthDelay + BASE_ACTIVATE_DELAY); in ar5212Reset()
757 OS_DELAY(5); in ar5212ChannelChange()
776 OS_DELAY(synthDelay + BASE_ACTIVATE_DELAY); in ar5212ChannelChange()
952 OS_DELAY(PLL_SETTLE_DELAY); in ar5212ChipReset()
958 OS_DELAY(PLL_SETTLE_DELAY); in ar5212ChipReset()
1181 OS_DELAY(50); in ar5212MacStop()
1231 OS_DELAY(15); in ar5212SetResetReg()
1267 OS_DELAY(15); in ar5212SetResetReg()
[all …]
H A Dar5212_attach.c508 OS_DELAY(2000); in ar5212Attach()
513 OS_DELAY(2000); in ar5212Attach()
640 OS_DELAY(100); in ar5212ChipTest()
H A Dar5212_xmit.c602 OS_DELAY(100); /* XXX get actual value */ in ar5212StopTxDma()
649 OS_DELAY(200); in ar5212StopTxDma()
663 OS_DELAY(10); in ar5212StopTxDma()
/dragonfly/sys/dev/netif/ath/ath_hal/ar9002/
H A Dar9285_cal.c97 OS_DELAY(30); in ar9285_hw_pa_cal()
105 OS_DELAY(1); in ar9285_hw_pa_cal()
114 OS_DELAY(1); in ar9285_hw_pa_cal()
H A Dar9287_olc.c52 OS_DELAY(100); in ar9287olcInit()
H A Dar9280_attach.c137 OS_DELAY(RTC_PLL_SETTLE_DELAY); in ar9280InitPLL()
432 OS_DELAY(1000); in ar9280ConfigPCIE()
545 OS_DELAY(100); in ar9280WriteIni()
/dragonfly/sys/dev/netif/ath/ath_hal/ar9001/
H A Dar9130_phy.c45 OS_DELAY(RTC_PLL_SETTLE_DELAY); in ar9130InitPLL()
/dragonfly/tools/tools/ath/common/
H A Dah_osdep.h45 #define OS_DELAY(_n) DELAY(_n) macro
/dragonfly/sys/dev/netif/ath/ath_hal/
H A Dah_osdep.h79 #define OS_DELAY(_n) DELAY(_n) macro
H A Dah_internal.h604 (((_v) << _f##_S) & (_f))) ; OS_DELAY(100); } while (0)
606 do { OS_REG_WRITE(_a, _r, _v); OS_DELAY(100); } while (0)
923 OS_DELAY(1); \

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