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Searched refs:chip (Results 1 – 25 of 59) sorted by relevance

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/dragonfly/sys/dev/disk/nata/chipsets/
H A Data-via.c86 if (!(ctlr->chip = ata_find_chip(dev, ids, -99))) in ata_via_ident()
90 if (!(ctlr->chip = ata_match_chip(dev, new_ids))) in ata_via_ident()
107 if (ctlr->chip->max_dma >= ATA_SA150) { in ata_via_chipinit()
124 if (ctlr->chip->cfg2 & VIABAR) { in ata_via_chipinit()
134 if (ctlr->chip->cfg2 & VIACLK) in ata_via_chipinit()
138 if (ctlr->chip->cfg2 & VIABUG) in ata_via_chipinit()
167 if (ctlr->chip->cfg2 & VIABAR) { in ata_via_allocate()
218 if ((ctlr->chip->cfg2 & VIABAR) && (ch->unit > 1)) in ata_via_reset()
245 ctlr->chip->text); in ata_via_new_setmode()
284 ctlr->chip->text); in ata_via_old_setmode()
[all …]
H A Data-jmicron.c66 ctlr->chip = idx; in ata_jmicron_ident()
91 ctlr->channels = ctlr->chip->cfg2; in ata_jmicron_chipinit()
98 if (ctlr->chip->cfg1 && (error = ata_ahci_chipinit(dev))) { in ata_jmicron_chipinit()
109 ctlr->channels = ctlr->chip->cfg1 + ctlr->chip->cfg2; in ata_jmicron_chipinit()
121 if (ch->unit >= ctlr->chip->cfg1) { in ata_jmicron_allocate()
122 ch->unit -= ctlr->chip->cfg1; in ata_jmicron_allocate()
124 ch->unit += ctlr->chip->cfg1; in ata_jmicron_allocate()
137 if (ch->unit >= ctlr->chip->cfg1) in ata_jmicron_reset()
149 if (ch->unit >= ctlr->chip->cfg1) in ata_jmicron_dmainit()
161 if (pci_read_config(dev, 0xdf, 1) & 0x40 || ch->unit >= ctlr->chip->cfg1) { in ata_jmicron_setmode()
H A Data-acerlabs.c61 if (!(ctlr->chip = ata_match_chip(dev, ids))) in ata_ali_ident()
77 switch (ctlr->chip->cfg2) { in ata_ali_chipinit()
79 ctlr->channels = ctlr->chip->cfg1; in ata_ali_chipinit()
84 if ((ctlr->chip->chipid == ATA_ALI_5288) && in ata_ali_chipinit()
104 if (ctlr->chip->chiprev <= 0xc4) in ata_ali_chipinit()
133 if (ctlr->chip->chiprev <= 0xc4) { in ata_ali_allocate()
200 if (ctlr->chip->chiprev == 0xc3 || ctlr->chip->chiprev == 0xc2) { in ata_ali_reset()
234 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); in ata_ali_setmode()
236 if (ctlr->chip->cfg2 & ALI_NEW) { in ata_ali_setmode()
246 if (ctlr->chip->cfg2 & ALI_OLD) { in ata_ali_setmode()
[all …]
H A Data-promise.c182 ctlr->chip = idx; in ata_promise_ident()
196 switch (ctlr->chip->cfg1) { in ata_promise_chipinit()
229 if (ctlr->chip->cfg2 == PR_SX4X) { in ata_promise_chipinit()
274 switch (ctlr->chip->cfg2) { in ata_promise_chipinit()
308 if ((ctlr->chip->cfg2 == PR_SATA2) || (ctlr->chip->cfg2 == PR_CMBO2)) in ata_promise_chipinit()
449 switch (ctlr->chip->cfg1) { in ata_promise_setmode()
488 if (ctlr->chip->cfg1 < PR_TX) in ata_promise_setmode()
568 switch (ctlr->chip->cfg2) { in ata_promise_mio_intr()
608 switch (ctlr->chip->cfg2) { in ata_promise_mio_status()
708 switch (ctlr->chip->cfg2) { in ata_promise_mio_reset()
[all …]
H A Data-nvidia.c149 if (!(ctlr->chip = ata_match_chip(dev, ids))) in ata_nvidia_ident()
153 if (ctlr->chip->cfg1 & NVAHCI) in ata_nvidia_ident()
168 if (ctlr->chip->max_dma >= ATA_SA150) { in ata_nvidia_chipinit()
176 int offset = ctlr->chip->cfg1 & NV4 ? 0x0440 : 0x0010; in ata_nvidia_chipinit()
185 if (ctlr->chip->cfg1 & NVQ) { in ata_nvidia_chipinit()
247 int offset = ctlr->chip->cfg1 & NV4 ? 0x0440 : 0x0010; in ata_nvidia_status()
248 int shift = ch->unit << (ctlr->chip->cfg1 & NVQ ? 4 : 2); in ata_nvidia_status()
252 if (ctlr->chip->cfg1 & NVQ) in ata_nvidia_status()
262 if (ctlr->chip->cfg1 & NVQ) in ata_nvidia_status()
294 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); in ata_nvidia_setmode()
[all …]
H A Data-ati.c69 if (!(ctlr->chip = ata_match_chip(dev, ids))) in ata_ati_ident()
74 switch (ctlr->chip->cfg1) { in ata_ati_ident()
103 if ((ctlr->chip->chipid == ATA_ATI_IXP600) || in ata_ati_chipinit()
104 (ctlr->chip->chipid == ATA_ATI_IXP700)) in ata_ati_chipinit()
108 if (ctlr->chip->cfg1 & ATI_AHCI) { in ata_ati_chipinit()
138 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); in ata_ati_setmode()
147 ata_mode2str(mode), ctlr->chip->text); in ata_ati_setmode()
H A Data-highpoint.c77 ctlr->chip = idx; in ata_highpoint_ident()
90 if (ctlr->chip->cfg2 == HPT_OLD) { in ata_highpoint_chipinit()
103 if (ctlr->chip->cfg1 < HPT_372) in ata_highpoint_chipinit()
155 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); in ata_highpoint_setmode()
157 if (ctlr->chip->cfg1 == HPT_366 && ata_atapi(dev)) in ata_highpoint_setmode()
174 timings33[ata_mode2idx(mode)][ctlr->chip->cfg1], 4); in ata_highpoint_setmode()
186 if (ctlr->chip->cfg1 == HPT_374 && pci_get_function(gparent) == 1) { in ata_highpoint_check_80pin()
H A Data-amd.c53 if (!(ctlr->chip = ata_match_chip(dev, ids))) in ata_amd_ident()
70 if (ctlr->chip->cfg1 & AMD_BUG) in ata_amd_chipinit()
95 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); in ata_amd_setmode()
97 if (ctlr->chip->cfg1 & AMD_CABLE) { in ata_amd_setmode()
111 ctlr->chip->text); in ata_amd_setmode()
H A Data-acard.c57 if (!(ctlr->chip = ata_match_chip(dev, ids))) in ata_acard_ident()
74 if (ctlr->chip->cfg1 == ATP_OLD) { in ata_acard_chipinit()
102 if (ctlr->chip->cfg1 == ATP_OLD && in ata_acard_status()
136 ata_atapi(dev) ? ATA_PIO_MAX : ctlr->chip->max_dma); in ata_acard_850_setmode()
144 ata_mode2str(mode), ctlr->chip->text); in ata_acard_850_setmode()
173 ata_atapi(dev) ? ATA_PIO_MAX : ctlr->chip->max_dma); in ata_acard_86X_setmode()
183 ata_mode2str(mode), ctlr->chip->text); in ata_acard_86X_setmode()
H A Data-siliconimage.c98 switch (ctlr->chip->cfg1) { in ata_sii_chipinit()
137 if (ctlr->chip->chipid != ATA_SII0680 || in ata_sii_chipinit()
144 if (ctlr->chip->cfg2 & SII_SETCLK) { in ata_sii_chipinit()
150 ctlr->chip->text); in ata_sii_chipinit()
154 if (ctlr->chip->cfg2 & SII_4CH) { in ata_sii_chipinit()
169 if (ctlr->chip->max_dma >= ATA_SA150) { in ata_sii_chipinit()
203 if (ctlr->chip->cfg2 & SII_INTR) in ata_cmd_allocate()
251 ata_mode2str(mode), ctlr->chip->text); in ata_cmd_setmode()
301 if (ctlr->chip->max_dma >= ATA_SA150) { in ata_sii_allocate()
334 if (ctlr->chip->max_dma >= ATA_SA150 && in ata_sii_status()
[all …]
H A Data-sis.c129 ctlr->chip = idx; in ata_sis_ident()
142 switch (ctlr->chip->cfg1) { in ata_sis_chipinit()
184 int offset = ch->unit << ((ctlr->chip->chipid == ATA_SIS182) ? 5 : 6); in ata_sis_allocate()
220 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); in ata_sis_setmode()
222 if (ctlr->chip->cfg1 == SIS_133NEW) { in ata_sis_setmode()
242 ata_mode2str(mode), ctlr->chip->text); in ata_sis_setmode()
244 switch (ctlr->chip->cfg1) { in ata_sis_setmode()
H A Data-marvell.c91 if (!(ctlr->chip = ata_match_chip(dev, ids))) in ata_marvell_ident()
96 switch (ctlr->chip->cfg2) { in ata_marvell_ident()
120 ctlr->channels = ctlr->chip->cfg1; in ata_marvell_pata_chipinit()
146 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); in ata_marvell_pata_setmode()
178 ctlr->channels = ctlr->chip->cfg1; in ata_marvell_edma_chipinit()
182 if (ctlr->chip->cfg1 > 4) in ata_marvell_edma_chipinit()
226 switch (ctlr->chip->cfg2) { in ata_marvell_edma_allocate()
363 if (ctlr->chip->cfg2 != MV_6042 && ctlr->chip->cfg2 != MV_7042) { in ata_marvell_edma_begin_transaction()
562 if (ctlr->chip->cfg2 == MV_50XX || ctlr->chip->cfg2 == MV_60XX) in ata_marvell_edma_dmainit()
H A Data-serverworks.c64 if (!(ctlr->chip = ata_match_chip(dev, ids))) in ata_serverworks_ident()
80 if (ctlr->chip->cfg1 == SWKS_MIO) { in ata_serverworks_chipinit()
89 ctlr->channels = ctlr->chip->cfg2; in ata_serverworks_chipinit()
94 else if (ctlr->chip->cfg1 == SWKS_33) { in ata_serverworks_chipinit()
114 ((ctlr->chip->cfg1 == SWKS_100) ? 0x03 : 0x02), 1); in ata_serverworks_chipinit()
263 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); in ata_serverworks_setmode()
272 ata_mode2str(mode), ctlr->chip->text); in ata_serverworks_setmode()
H A Data-intel.c119 if (!(ctlr->chip = ata_match_chip(dev, ids))) in ata_intel_ident()
136 if (ctlr->chip->chipid == ATA_I82371FB) { in ata_intel_chipinit()
141 else if (ctlr->chip->chipid == ATA_I31244) { in ata_intel_chipinit()
159 else if (ctlr->chip->max_dma < ATA_SA150) { in ata_intel_chipinit()
160 ctlr->channels = ctlr->chip->cfg2; in ata_intel_chipinit()
177 if ((ctlr->chip->cfg1 == INTEL_AHCI) && in ata_intel_chipinit()
229 if (ctlr->chip->cfg1) { in ata_intel_reset()
286 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); in ata_intel_new_setmode()
298 ata_mode2str(mode), ctlr->chip->text); in ata_intel_new_setmode()
H A Data-ite.c48 if (!(ctlr->chip = ata_match_chip(dev, ids))) in ata_ite_ident()
64 if (ctlr->chip->chipid == ATA_IT8213F) { in ata_ite_chipinit()
164 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); in ata_ite_8213_setmode()
176 ata_mode2str(mode), ctlr->chip->text); in ata_ite_8213_setmode()
H A Data-adaptec.c48 if (!(ctlr->chip = ata_match_chip(dev, ids))) in ata_adaptec_ident()
/dragonfly/sys/bus/u4b/wlan/
H A Dif_urtwn.c508 sc->chip |= URTWN_CHIP_88E; in urtwn_attach()
553 if (sc->chip & URTWN_CHIP_92C) { in urtwn_attach()
561 if (sc->chip & URTWN_CHIP_88E) in urtwn_attach()
1073 if (sc->chip & URTWN_CHIP_88E) in urtwn_rx_frame()
1895 if (sc->chip & URTWN_CHIP_88E) in urtwn_read_chipid()
1903 sc->chip |= URTWN_CHIP_92C; in urtwn_read_chipid()
1911 sc->chip |= URTWN_CHIP_UMC; in urtwn_read_chipid()
3027 if (sc->chip & URTWN_CHIP_88E) in urtwn_tx_data()
3149 if (sc->chip & URTWN_CHIP_88E) in urtwn_tx_raw()
3872 if (sc->chip & URTWN_CHIP_88E) in urtwn_load_firmware()
[all …]
H A Dif_urtwnvar.h165 u_int chip; member
172 #define URTWN_CHIP_HAS_RATECTL(_sc) (!!((_sc)->chip & URTWN_CHIP_88E))
/dragonfly/sys/dev/disk/advansys/
H A Dadw_pci.c311 adw->chip = ADW_CHIP_NONE; in adw_generic_setup()
328 adw->chip = ADW_CHIP_ASC3550; in adw_asc3550_setup()
365 adw->chip = ADW_CHIP_ASC38C0800; in adw_asc38C0800_setup()
381 adw->chip = ADW_CHIP_ASC38C1600; in adw_asc38C1600_setup()
H A Dadwlib.c373 if ((adw->chip == ADW_CHIP_ASC3550) in adw_init_chip()
501 adw_lram_write_16(adw, ADW_MC_CHIP_TYPE, adw->chip); in adw_init_chip()
/dragonfly/sys/dev/disk/ahci/
H A Dahci_attach.c211 u_int32_t chip; in ahci_pci_attach() local
230 chip = ((uint16_t)pci_get_device(dev) << 16) | in ahci_pci_attach()
233 switch(chip) { in ahci_pci_attach()
/dragonfly/sys/bus/mmc/
H A Dmmcbr_if.m62 # This is the interface that a mmc bridge chip gives to the mmc bus
83 # type of SPI chip select, power mode and bus width.
/dragonfly/contrib/binutils-2.27/gas/doc/
H A Dc-ppc.texi29 The PowerPC chip family includes several successive levels, using the same
32 instructions each variant supports, please see the chip's architecture
H A Dc-metag.texi34 each core supports, please see the chip's technical reference manual.
/dragonfly/sys/dev/disk/sym/
H A Dsym_hipd.c2001 if (chip->features & FE_LDSTR) in sym_find_firmware()
8459 const struct sym_pci_chip *chip; local
8471 chip = &sym_pci_dev_table[i];
8476 return chip;
8488 const struct sym_pci_chip *chip; local
8490 chip = sym_find_pci_chip(dev);
8491 if (chip && sym_find_firmware(chip)) {
8505 const struct sym_pci_chip *chip; local
8524 chip = sym_find_pci_chip(dev);
8525 if (chip == NULL || (fw = sym_find_firmware(chip)) == NULL)
[all …]

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