/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/ |
H A D | vega12_hwmgr.c | 525 dpm_table->dpm_levels[i].value = clk; in vega12_setup_single_dpm_table() 526 dpm_table->dpm_levels[i].enabled = true; in vega12_setup_single_dpm_table() 702 dpm_table->dpm_levels[min_level].value; 973 if (table->dpm_levels[i].enabled) in vega12_find_lowest_dpm_level() 979 table->dpm_levels[i].enabled = true; in vega12_find_lowest_dpm_level() 994 if (table->dpm_levels[i].enabled) in vega12_find_highest_dpm_level() 1000 table->dpm_levels[i].enabled = true; in vega12_find_highest_dpm_level() 1641 dpm_table->dpm_levels[i].value * 1000; in vega12_get_sclks() 2268 value = (mclk_table->dpm_levels 2270 golden_mclk_table->dpm_levels [all …]
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H A D | vega10_hwmgr.c | 1640 dpm_table->dpm_levels[i].value, in vega10_populate_all_graphic_levels() 1650 dpm_table->dpm_levels[j].value, in vega10_populate_all_graphic_levels() 4505 golden_sclk_table->dpm_levels in vega10_get_sclk_od() 4508 golden_sclk_table->dpm_levels in vega10_get_sclk_od() 4531 golden_sclk_table->dpm_levels in vega10_set_sclk_od() 4534 golden_sclk_table->dpm_levels in vega10_set_sclk_od() 4555 value = (mclk_table->dpm_levels in vega10_get_mclk_od() 4557 golden_mclk_table->dpm_levels in vega10_get_mclk_od() 4560 golden_mclk_table->dpm_levels in vega10_get_mclk_od() 4583 golden_mclk_table->dpm_levels in vega10_set_mclk_od() [all …]
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H A D | smu7_hwmgr.c | 3607 if (sclk == sclk_table->dpm_levels[i].value) in smu7_find_dpm_states_clocks_in_dpm_table() 3624 if (mclk == mclk_table->dpm_levels[i].value) in smu7_find_dpm_states_clocks_in_dpm_table() 3655 dpm_table->pcie_speed_table.dpm_levels in smu7_get_maximum_link_speed() 3805 dpm_table->dpm_levels[i].enabled = false; in smu7_trim_single_dpm_states() 3807 dpm_table->dpm_levels[i].enabled = true; in smu7_trim_single_dpm_states() 4446 if (clock > sclk_table->dpm_levels[i].value) in smu7_print_clock_levels() 4454 i, sclk_table->dpm_levels[i].value / 100, in smu7_print_clock_levels() 4462 if (clock > mclk_table->dpm_levels[i].value) in smu7_print_clock_levels() 4470 i, mclk_table->dpm_levels[i].value / 100, in smu7_print_clock_levels() 4771 mclk_table->dpm_levels[0].value; in smu7_get_max_high_clocks() [all …]
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H A D | smu7_hwmgr.h | 100 struct smu7_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member
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H A D | vega10_hwmgr.h | 136 struct vega10_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member
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H A D | vega12_hwmgr.h | 110 struct vega12_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member
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/dragonfly/sys/dev/drm/radeon/ |
H A D | ci_dpm.c | 2651 if (dpm_table->dpm_levels[i-1].enabled) in ci_get_dpm_level_enable_mask_value() 3416 dpm_table->dpm_levels[i].enabled = false; in ci_reset_single_dpm_table() 3424 dpm_table->dpm_levels[index].enabled = true; in ci_setup_pcie_table_entry() 3580 if (value == table->dpm_levels[i].value) { in ci_find_boot_level() 3746 dpm_table->dpm_levels[i].enabled = false; in ci_trim_single_dpm_states() 3748 dpm_table->dpm_levels[i].enabled = true; in ci_trim_single_dpm_states() 3767 pcie_table->dpm_levels[i].enabled = true; in ci_trim_pcie_dpm_states() 3771 if (pcie_table->dpm_levels[i].enabled) { in ci_trim_pcie_dpm_states() 3773 if (pcie_table->dpm_levels[j].enabled) { in ci_trim_pcie_dpm_states() 3774 if ((pcie_table->dpm_levels[i].value == pcie_table->dpm_levels[j].value) && in ci_trim_pcie_dpm_states() [all …]
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H A D | ci_dpm.h | 64 struct ci_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member
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/dragonfly/sys/dev/drm/amd/powerplay/smumgr/ |
H A D | fiji_smumgr.c | 850 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in fiji_populate_smc_link_level() 852 dpm_table->pcie_speed_table.dpm_levels[i].param1); in fiji_populate_smc_link_level() 1038 dpm_table->sclk_table.dpm_levels[i].value, in fiji_populate_all_graphic_levels() 1248 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in fiji_populate_all_memory_levels() 1252 dpm_table->mclk_table.dpm_levels[i].value, in fiji_populate_all_memory_levels() 1329 data->dpm_table.sclk_table.dpm_levels[0].value; in fiji_populate_smc_acpi_level() 1387 data->dpm_table.mclk_table.dpm_levels[0].value; in fiji_populate_smc_acpi_level() 1408 data->dpm_table.mclk_table.dpm_levels[0].value, in fiji_populate_smc_acpi_level() 1549 data->dpm_table.sclk_table.dpm_levels[i].value, in fiji_program_memory_timing_parameters() 1550 data->dpm_table.mclk_table.dpm_levels[j].value, in fiji_program_memory_timing_parameters()
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H A D | polaris10_smumgr.c | 777 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in polaris10_populate_smc_link_level() 779 dpm_table->pcie_speed_table.dpm_levels[i].param1); in polaris10_populate_smc_link_level() 1003 dpm_table->sclk_table.dpm_levels[i].value, in polaris10_populate_all_graphic_levels() 1138 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in polaris10_populate_all_memory_levels() 1142 dpm_table->mclk_table.dpm_levels[i].value, in polaris10_populate_all_memory_levels() 1260 data->dpm_table.mclk_table.dpm_levels[0].value, in polaris10_populate_smc_acpi_level() 1371 hw_data->dpm_table.sclk_table.dpm_levels[i].value, in polaris10_program_memory_timing_parameters() 1372 hw_data->dpm_table.mclk_table.dpm_levels[j].value, in polaris10_program_memory_timing_parameters() 1375 result = atomctrl_set_ac_timing_ai(hwmgr, hw_data->dpm_table.mclk_table.dpm_levels[j].value, j); in polaris10_program_memory_timing_parameters()
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H A D | vegam_smumgr.c | 581 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in vegam_populate_smc_link_level() 583 dpm_table->pcie_speed_table.dpm_levels[i].param1); in vegam_populate_smc_link_level() 891 dpm_table->sclk_table.dpm_levels[i].value, in vegam_populate_all_graphic_levels() 1049 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in vegam_populate_all_memory_levels() 1053 dpm_table->mclk_table.dpm_levels[i].value, in vegam_populate_all_memory_levels() 1179 data->dpm_table.mclk_table.dpm_levels[0].value, in vegam_populate_smc_acpi_level() 1301 hw_data->dpm_table.sclk_table.dpm_levels[i].value, in vegam_program_memory_timing_parameters() 1302 hw_data->dpm_table.mclk_table.dpm_levels[j].value, in vegam_program_memory_timing_parameters()
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H A D | iceland_smumgr.c | 774 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in iceland_populate_smc_link_level() 776 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in iceland_populate_smc_link_level() 982 dpm_table->sclk_table.dpm_levels[i].value, in iceland_populate_all_graphic_levels() 1361 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in iceland_populate_all_memory_levels() 1363 result = iceland_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value, in iceland_populate_all_memory_levels() 1623 (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value, in iceland_program_memory_timing_parameters() 1624 data->dpm_table.mclk_table.dpm_levels[j].value, in iceland_program_memory_timing_parameters() 1763 data->dpm_table.mclk_table.dpm_levels[i].value, in iceland_convert_mc_reg_table_to_smc()
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H A D | ci_smumgr.c | 486 dpm_table->sclk_table.dpm_levels[i].value, in ci_populate_all_graphic_levels() 1005 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in ci_populate_smc_link_level() 1007 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in ci_populate_smc_link_level() 1314 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in ci_populate_all_memory_levels() 1316 result = ci_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value, in ci_populate_all_memory_levels() 1660 (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value, in ci_program_memory_timing_parameters() 1661 data->dpm_table.mclk_table.dpm_levels[j].value, in ci_program_memory_timing_parameters() 1796 data->dpm_table.mclk_table.dpm_levels[i].value, in ci_convert_mc_reg_table_to_smc()
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H A D | tonga_smumgr.c | 507 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in tonga_populate_smc_link_level() 509 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in tonga_populate_smc_link_level() 702 dpm_table->sclk_table.dpm_levels[i].value, in tonga_populate_all_graphic_levels() 1098 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in tonga_populate_all_memory_levels() 1103 dpm_table->mclk_table.dpm_levels[i].value, in tonga_populate_all_memory_levels() 1490 (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value, in tonga_program_memory_timing_parameters() 1491 data->dpm_table.mclk_table.dpm_levels[j].value, in tonga_program_memory_timing_parameters() 2133 data->dpm_table.mclk_table.dpm_levels[i].value, in tonga_convert_mc_reg_table_to_smc()
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