/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/ |
H A D | vega12_hwmgr.c | 551 dpm_table = &(data->dpm_table.soc_table); in vega12_setup_default_dpm_tables() 564 dpm_table = &(data->dpm_table.gfx_table); in vega12_setup_default_dpm_tables() 577 dpm_table = &(data->dpm_table.mem_table); in vega12_setup_default_dpm_tables() 590 dpm_table = &(data->dpm_table.eclk_table); in vega12_setup_default_dpm_tables() 603 dpm_table = &(data->dpm_table.vclk_table); in vega12_setup_default_dpm_tables() 616 dpm_table = &(data->dpm_table.dclk_table); in vega12_setup_default_dpm_tables() 629 dpm_table = &(data->dpm_table.dcef_table); in vega12_setup_default_dpm_tables() 664 dpm_table = &(data->dpm_table.phy_table); in vega12_setup_default_dpm_tables() 1635 dpm_table = &(data->dpm_table.gfx_table); in vega12_get_sclks() 1667 dpm_table = &(data->dpm_table.mem_table); in vega12_get_memclocks() [all …]
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H A D | vega10_hwmgr.c | 1313 dpm_table = &(data->dpm_table.soc_table); in vega10_setup_default_dpm_tables() 1320 dpm_table = &(data->dpm_table.gfx_table); in vega10_setup_default_dpm_tables() 1331 dpm_table = &(data->dpm_table.mem_table); in vega10_setup_default_dpm_tables() 1342 dpm_table = &(data->dpm_table.eclk_table); in vega10_setup_default_dpm_tables() 1358 dpm_table = &(data->dpm_table.vclk_table); in vega10_setup_default_dpm_tables() 1372 dpm_table = &(data->dpm_table.dclk_table); in vega10_setup_default_dpm_tables() 1387 dpm_table = &(data->dpm_table.dcef_table); in vega10_setup_default_dpm_tables() 1408 dpm_table = &(data->dpm_table.phy_table); in vega10_setup_default_dpm_tables() 1661 dpm_table = &(data->dpm_table.soc_table); in vega10_populate_all_graphic_levels() 4785 dpm_table = &data->dpm_table.soc_table; in vega10_odn_update_soc_table() [all …]
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H A D | smu7_hwmgr.c | 628 memset(&(data->dpm_table), 0x00, sizeof(data->dpm_table)); in smu7_reset_dpm_tables() 631 &data->dpm_table.sclk_table, in smu7_reset_dpm_tables() 636 &data->dpm_table.mclk_table, in smu7_reset_dpm_tables() 694 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value = in smu7_setup_dpm_tables_v0() 708 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v0() 788 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value = in smu7_setup_dpm_tables_v1() 791 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].enabled = in smu7_setup_dpm_tables_v1() 804 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v1() 806 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].enabled = in smu7_setup_dpm_tables_v1() 3644 struct smu7_dpm_table *dpm_table = &data->dpm_table; in smu7_get_maximum_link_speed() local [all …]
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H A D | smu_helper.c | 303 struct vi_dpm_table *dpm_table = (struct vi_dpm_table *)table; in phm_reset_single_dpm_table() local 305 dpm_table->count = count > max ? max : count; in phm_reset_single_dpm_table() 307 for (i = 0; i < dpm_table->count; i++) in phm_reset_single_dpm_table() 308 dpm_table->dpm_level[i].enabled = false; in phm_reset_single_dpm_table() 319 dpm_table->dpm_level[index].value = pcie_gen; in phm_setup_pcie_table_entry() 320 dpm_table->dpm_level[index].param1 = pcie_lanes; in phm_setup_pcie_table_entry() 321 dpm_table->dpm_level[index].enabled = 1; in phm_setup_pcie_table_entry() 330 for (i = dpm_table->count; i > 0; i--) { in phm_get_dpm_level_enable_mask_value() 332 if (dpm_table->dpm_level[i - 1].enabled) in phm_get_dpm_level_enable_mask_value() 402 for (i = 0; i < dpm_table->count; i++) { in phm_find_boot_level() [all …]
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H A D | smu7_hwmgr.h | 203 struct smu7_dpm_table dpm_table; member
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H A D | vega10_hwmgr.h | 310 struct vega10_dpm_table dpm_table; member
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H A D | vega12_hwmgr.h | 314 struct vega12_dpm_table dpm_table; member
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/dragonfly/sys/dev/drm/amd/powerplay/smumgr/ |
H A D | fiji_smumgr.c | 524 dpm_table->GpuTjHyst = 8; in fiji_populate_bapm_parameters_in_dpm_table() 565 dpm_table->Liquid_I2C_LineSCL = uc_scl; in fiji_populate_bapm_parameters_in_dpm_table() 566 dpm_table->Liquid_I2C_LineSDA = uc_sda; in fiji_populate_bapm_parameters_in_dpm_table() 569 dpm_table->Vr_I2C_LineSCL = uc_scl; in fiji_populate_bapm_parameters_in_dpm_table() 570 dpm_table->Vr_I2C_LineSDA = uc_sda; in fiji_populate_bapm_parameters_in_dpm_table() 573 dpm_table->Plx_I2C_LineSCL = uc_scl; in fiji_populate_bapm_parameters_in_dpm_table() 574 dpm_table->Plx_I2C_LineSDA = uc_sda; in fiji_populate_bapm_parameters_in_dpm_table() 842 struct smu7_dpm_table *dpm_table = &data->dpm_table; in fiji_populate_smc_link_level() local 1018 struct smu7_dpm_table *dpm_table = &data->dpm_table; in fiji_populate_all_graphic_levels() local 1056 (uint8_t)dpm_table->sclk_table.count; in fiji_populate_all_graphic_levels() [all …]
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H A D | iceland_smumgr.c | 767 struct smu7_dpm_table *dpm_table = &data->dpm_table; in iceland_populate_smc_link_level() local 788 (uint8_t)dpm_table->pcie_speed_table.count; in iceland_populate_smc_link_level() 963 struct smu7_dpm_table *dpm_table = &data->dpm_table; in iceland_populate_all_graphic_levels() local 982 dpm_table->sclk_table.dpm_levels[i].value, in iceland_populate_all_graphic_levels() 996 if (dpm_table->sclk_table.count > 1) in iceland_populate_all_graphic_levels() 1001 (uint8_t)dpm_table->sclk_table.count; in iceland_populate_all_graphic_levels() 1349 struct smu7_dpm_table *dpm_table = &data->dpm_table; in iceland_populate_all_memory_levels() local 1869 dpm_table->DTETjOffset = 0; in iceland_populate_bapm_parameters_in_dpm_table() 1872 dpm_table->GpuTjHyst = 8; in iceland_populate_bapm_parameters_in_dpm_table() 1881 dpm_table->PPM_PkgPwrLimit = 0; in iceland_populate_bapm_parameters_in_dpm_table() [all …]
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H A D | ci_smumgr.c | 474 struct smu7_dpm_table *dpm_table = &data->dpm_table; in ci_populate_all_graphic_levels() local 486 dpm_table->sclk_table.dpm_levels[i].value, in ci_populate_all_graphic_levels() 492 if (i == (dpm_table->sclk_table.count - 1)) in ci_populate_all_graphic_levels() 727 dpm_table->DTETjOffset = 0; in ci_populate_bapm_parameters_in_dpm_table() 729 dpm_table->GpuTjHyst = 8; in ci_populate_bapm_parameters_in_dpm_table() 737 dpm_table->PPM_PkgPwrLimit = 0; in ci_populate_bapm_parameters_in_dpm_table() 738 dpm_table->PPM_TemperatureLimit = 0; in ci_populate_bapm_parameters_in_dpm_table() 998 struct smu7_dpm_table *dpm_table = &data->dpm_table; in ci_populate_smc_link_level() local 1014 (uint8_t)dpm_table->pcie_speed_table.count; in ci_populate_smc_link_level() 1301 struct smu7_dpm_table *dpm_table = &data->dpm_table; in ci_populate_all_memory_levels() local [all …]
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H A D | vegam_smumgr.c | 574 struct smu7_dpm_table *dpm_table = &data->dpm_table; in vegam_populate_smc_link_level() local 591 (uint8_t)dpm_table->pcie_speed_table.count; in vegam_populate_smc_link_level() 868 struct smu7_dpm_table *dpm_table = &hw_data->dpm_table; in vegam_populate_all_graphic_levels() local 891 dpm_table->sclk_table.dpm_levels[i].value, in vegam_populate_all_graphic_levels() 909 (uint8_t)dpm_table->sclk_table.count; in vegam_populate_all_graphic_levels() 913 for (i = 0; i < dpm_table->sclk_table.count; i++) in vegam_populate_all_graphic_levels() 1037 struct smu7_dpm_table *dpm_table = &hw_data->dpm_table; in vegam_populate_all_memory_levels() local 1053 dpm_table->mclk_table.dpm_levels[i].value, in vegam_populate_all_memory_levels() 1066 (uint8_t)dpm_table->mclk_table.count; in vegam_populate_all_memory_levels() 1070 for (i = 0; i < dpm_table->mclk_table.count; i++) in vegam_populate_all_memory_levels() [all …]
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H A D | tonga_smumgr.c | 500 struct smu7_dpm_table *dpm_table = &data->dpm_table; in tonga_populate_smc_link_level() local 681 struct smu7_dpm_table *dpm_table = &data->dpm_table; in tonga_populate_all_graphic_levels() local 716 if (dpm_table->sclk_table.count > 1) in tonga_populate_all_graphic_levels() 721 (uint8_t)dpm_table->sclk_table.count; in tonga_populate_all_graphic_levels() 1081 struct smu7_dpm_table *dpm_table = &data->dpm_table; in tonga_populate_all_memory_levels() local 1830 dpm_table->TargetTdp = PP_HOST_TO_SMC_US( in tonga_populate_bapm_parameters_in_dpm_table() 1838 dpm_table->GpuTjHyst = 8; in tonga_populate_bapm_parameters_in_dpm_table() 1842 dpm_table->BAPM_TEMP_GRADIENT = in tonga_populate_bapm_parameters_in_dpm_table() 1850 dpm_table->BAPMTI_R[i][j][k] = in tonga_populate_bapm_parameters_in_dpm_table() 1852 dpm_table->BAPMTI_RC[i][j][k] = in tonga_populate_bapm_parameters_in_dpm_table() [all …]
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H A D | polaris10_smumgr.c | 770 struct smu7_dpm_table *dpm_table = &data->dpm_table; in polaris10_populate_smc_link_level() local 787 (uint8_t)dpm_table->pcie_speed_table.count; in polaris10_populate_smc_link_level() 980 struct smu7_dpm_table *dpm_table = &hw_data->dpm_table; in polaris10_populate_all_graphic_levels() local 1003 dpm_table->sclk_table.dpm_levels[i].value, in polaris10_populate_all_graphic_levels() 1018 (uint8_t)dpm_table->sclk_table.count; in polaris10_populate_all_graphic_levels() 1028 for (i = 0; i < dpm_table->sclk_table.count; i++) in polaris10_populate_all_graphic_levels() 1053 for (i = 2; i < dpm_table->sclk_table.count; i++) in polaris10_populate_all_graphic_levels() 1126 struct smu7_dpm_table *dpm_table = &hw_data->dpm_table; in polaris10_populate_all_memory_levels() local 1142 dpm_table->mclk_table.dpm_levels[i].value, in polaris10_populate_all_memory_levels() 1144 if (i == dpm_table->mclk_table.count - 1) { in polaris10_populate_all_memory_levels() [all …]
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/dragonfly/sys/dev/drm/radeon/ |
H A D | ci_dpm.c | 439 dpm_table->GpuTjMax = in ci_populate_bapm_parameters_in_dpm_table() 441 dpm_table->GpuTjHyst = 8; in ci_populate_bapm_parameters_in_dpm_table() 2664 struct ci_dpm_table *dpm_table = &pi->dpm_table; in ci_populate_smc_link_level() local 3313 struct ci_dpm_table *dpm_table = &pi->dpm_table; in ci_populate_all_graphic_levels() local 3360 struct ci_dpm_table *dpm_table = &pi->dpm_table; in ci_populate_all_memory_levels() local 3518 pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value = in ci_setup_default_dpm_tables() 3520 pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled = in ci_setup_default_dpm_tables() 3531 pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value = in ci_setup_default_dpm_tables() 3935 struct ci_dpm_table *dpm_table = &pi->dpm_table; in ci_populate_and_upload_sclk_mclk_dpm_levels() local 3942 dpm_table->sclk_table.dpm_levels[dpm_table->sclk_table.count-1].value = sclk; in ci_populate_and_upload_sclk_mclk_dpm_levels() [all …]
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H A D | ci_dpm.h | 194 struct ci_dpm_table dpm_table; member
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