| /dragonfly/sys/dev/drm/radeon/ |
| H A D | r520.c | 97 rdev->mc.vram_width = 128; in r520_vram_get_type()
102 rdev->mc.vram_width = 32; in r520_vram_get_type()
105 rdev->mc.vram_width = 64; in r520_vram_get_type()
108 rdev->mc.vram_width = 128; in r520_vram_get_type()
111 rdev->mc.vram_width = 256; in r520_vram_get_type()
114 rdev->mc.vram_width = 128; in r520_vram_get_type()
118 rdev->mc.vram_width *= 2; in r520_vram_get_type()
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| H A D | r300.c | 476 case 0: rdev->mc.vram_width = 64; break; in r300_mc_init()
477 case 1: rdev->mc.vram_width = 128; break; in r300_mc_init()
478 case 2: rdev->mc.vram_width = 256; break; in r300_mc_init()
479 default: rdev->mc.vram_width = 128; break; in r300_mc_init()
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| H A D | rv515.c | 178 rdev->mc.vram_width = 128; in rv515_vram_get_type()
183 rdev->mc.vram_width = 64; in rv515_vram_get_type()
186 rdev->mc.vram_width = 128; in rv515_vram_get_type()
189 rdev->mc.vram_width = 128; in rv515_vram_get_type()
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| H A D | r100.c | 2723 rdev->mc.vram_width = 32; in r100_vram_get_type()
2725 rdev->mc.vram_width = 64; in r100_vram_get_type()
2728 rdev->mc.vram_width /= 4; in r100_vram_get_type()
2734 rdev->mc.vram_width = 128; in r100_vram_get_type()
2736 rdev->mc.vram_width = 64; in r100_vram_get_type()
2740 rdev->mc.vram_width = 128; in r100_vram_get_type()
3274 temp = (rdev->mc.vram_width / 8) * (rdev->mc.vram_is_ddr ? 2 : 1); in r100_bandwidth_update()
3411 if (rdev->mc.vram_width == 128) in r100_bandwidth_update()
3421 if (rdev->mc.vram_width == 32) { in r100_bandwidth_update()
3589 temp = (rdev->mc.vram_width * rdev->mc.vram_is_ddr + 1)/128; in r100_bandwidth_update()
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| H A D | rs400.c | 269 rdev->mc.vram_width = 128; in rs400_mc_init()
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| H A D | radeon_clocks.c | 617 if (rdev->mc.vram_width == 64) { in radeon_legacy_set_clock_gating()
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| H A D | radeon_object.c | 466 rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S'); in radeon_bo_init()
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| H A D | rs690.c | 156 rdev->mc.vram_width = 128; in rs690_mc_init()
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| H A D | rs600.c | 874 rdev->mc.vram_width = 128; in rs600_mc_init()
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| H A D | rv770.c | 1669 rdev->mc.vram_width = numchan * chansize; in rv770_mc_init()
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| H A D | radeon.h | 699 unsigned vram_width; member
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| /dragonfly/sys/dev/drm/amd/amdgpu/ |
| H A D | amdgpu_gmc.h | 89 unsigned vram_width; member
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| H A D | amdgpu_amdkfd.c | 379 mem_info->vram_width = adev->gmc.vram_width; in get_local_mem_info()
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| H A D | gmc_v9_0.c | 722 adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev); in gmc_v9_0_mc_init()
723 if (!adev->gmc.vram_width) { in gmc_v9_0_mc_init()
731 adev->gmc.vram_width = numchan * chansize; in gmc_v9_0_mc_init()
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| H A D | gmc_v7_0.c | 322 adev->gmc.vram_width = amdgpu_atombios_get_vram_width(adev); in gmc_v7_0_mc_init()
323 if (!adev->gmc.vram_width) { in gmc_v7_0_mc_init()
365 adev->gmc.vram_width = numchan * chansize; in gmc_v7_0_mc_init()
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| H A D | gmc_v8_0.c | 524 adev->gmc.vram_width = amdgpu_atombios_get_vram_width(adev); in gmc_v8_0_mc_init()
525 if (!adev->gmc.vram_width) { in gmc_v8_0_mc_init()
567 adev->gmc.vram_width = numchan * chansize; in gmc_v8_0_mc_init()
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| H A D | amdgpu_object.c | 1069 adev->gmc.vram_width, amdgpu_vram_names[adev->gmc.vram_type]); in amdgpu_bo_init()
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| H A D | amdgpu_kms.c | 628 dev_info.vram_bit_width = adev->gmc.vram_width; in amdgpu_info_ioctl()
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| /dragonfly/sys/dev/drm/amd/include/ |
| H A D | kgd_kfd_interface.h | 79 uint32_t vram_width; member
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| /dragonfly/sys/dev/drm/amd/display/dc/ |
| H A D | dc_types.h | 70 uint32_t vram_width; member
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| /dragonfly/sys/dev/drm/amd/display/dc/dce110/ |
| H A D | dce110_compressor.c | 548 compressor->base.memory_bus_width = ctx->asic_id.vram_width; in dce110_compressor_construct()
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| /dragonfly/sys/dev/drm/amd/display/dc/dce112/ |
| H A D | dce112_compressor.c | 810 compressor->base.memory_bus_width = ctx->asic_id.vram_width; in dce112_compressor_construct()
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| /dragonfly/sys/dev/drm/amd/display/dc/calcs/ |
| H A D | dce_calcs.c | 2041 vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; in bw_calcs_init()
2157 vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; in bw_calcs_init()
2270 vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; in bw_calcs_init()
2386 vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; in bw_calcs_init()
2502 vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; in bw_calcs_init()
2615 vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; in bw_calcs_init()
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| /dragonfly/sys/dev/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_resource.c | 1218 dc->dcn_soc->number_of_channels = dc->ctx->asic_id.vram_width / ddr4_dram_width; in construct()
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| /dragonfly/sys/dev/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm.c | 419 init_data.asic_id.vram_width = adev->gmc.vram_width; in amdgpu_dm_init()
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