| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/ |
| H A D | urem-seteq-illegal-types.ll | 184 ; PPC64LE-NEXT: vsubuwm 2, 2, 4
|
| H A D | vaddsplat.ll | 88 ; CHECK: vsubuwm {{[0-9]+}}, [[REG1]], [[REG2]]
|
| H A D | vector-popcnt-128-ult-ugt.ll | 4208 ; PWR5-NEXT: vsubuwm 2, 2, 4
4244 ; PWR6-NEXT: vsubuwm 2, 2, 4
4282 ; PWR7-NEXT: vsubuwm 2, 2, 3
4336 ; PWR5-NEXT: vsubuwm 2, 2, 4
4373 ; PWR6-NEXT: vsubuwm 2, 2, 4
4411 ; PWR7-NEXT: vsubuwm 2, 2, 3
4467 ; PWR5-NEXT: vsubuwm 2, 2, 4
4504 ; PWR6-NEXT: vsubuwm 2, 2, 4
4542 ; PWR7-NEXT: vsubuwm 2, 2, 3
4598 ; PWR5-NEXT: vsubuwm 2, 2, 4
[all …]
|
| H A D | inc-of-add.ll | 400 ; PPC64LE-NEXT: vsubuwm 2, 3, 2
|
| H A D | mul-const-vector.ll | 209 ; CHECK-NEXT: vsubuwm v[[REG3:[0-9]+]], v[[REG2]], v2
222 ; CHECK-P8-NEXT: vsubuwm v{{[0-9]+}}, v[[REG3]], v[[REG2]]
235 ; CHECK-P8-NEXT: vsubuwm v{{[0-9]+}}, v[[REG4]], v[[REG3]]
246 ; CHECK-NEXT: vsubuwm v[[REG3:[0-9]+]], v2, v[[REG2]]
257 ; CHECK-NEXT: vsubuwm v[[REG4:[0-9]+]], v[[REG3]], v[[REG2]]
268 ; CHECK-NEXT: vsubuwm v[[REG4:[0-9]+]], v[[REG3]], v[[REG2]]
271 ; CHECK-NEXT: vsubuwm v[[REG6:[0-9]+]], v[[REG5]], v2
|
| H A D | neg-abs.ll | 40 ; CHECK-LE-NEXT: vsubuwm v3, v3, v2
|
| H A D | signbit-shift.ll | 37 ; CHECK-NEXT: vsubuwm 2, 3, 2
195 ; CHECK-NEXT: vsubuwm 3, 4, 3
225 ; CHECK-NEXT: vsubuwm 3, 4, 3
252 ; CHECK-NEXT: vsubuwm 4, 5, 4
279 ; CHECK-NEXT: vsubuwm 3, 4, 3
|
| H A D | vavg.ll | 181 ; CHECK-P9-NEXT: vsubuwm 2, 3, 2
190 ; CHECK-P8-NEXT: vsubuwm 2, 3, 2
198 ; CHECK-P7-NEXT: vsubuwm 2, 3, 2
|
| H A D | vector-rotates.ll | 83 ; CHECK-P8-NEXT: vsubuwm v3, v4, v3
91 ; CHECK-P7-NEXT: vsubuwm v3, v4, v3
|
| H A D | funnel-shift-rot.ll | 334 ; CHECK32_64-NEXT: vsubuwm 3, 4, 3
341 ; CHECK64-NEXT: vsubuwm 3, 4, 3
363 ; CHECK32_64-NEXT: vsubuwm 3, 4, 3
371 ; CHECK64-NEXT: vsubuwm 3, 4, 3
|
| H A D | ppc64-P9-vabsd.ll | 19 ; CHECK-PWR8: vsubuwm
24 ; CHECK-PWR7: vsubuwm
42 ; CHECK-PWR8: vsubuwm
127 ; CHECK-NOT: vsubuwm
135 ; CHECK-PWR8-DAG: vsubuwm
140 ; CHECK-PWR7-DAG: vsubuwm
225 ; CHECK-PWR8-DAG: vsubuwm
416 ; CHECK-NOT: vsubuwm
425 ; CHECK-PWR8-DAG: vsubuwm
|
| H A D | pre-inc-disable.ll | 292 ; CHECK-NEXT: vsubuwm v2, v3, v2
313 ; P9BE-NEXT: vsubuwm v2, v3, v2
|
| H A D | vselect-constants.ll | 19 ; CHECK-NEXT: vsubuwm 3, 4, 3
68 ; CHECK-NEXT: vsubuwm 2, 3, 2
82 ; CHECK-NEXT: vsubuwm 3, 4, 3
111 ; CHECK-NEXT: vsubuwm 3, 4, 3
|
| H A D | vec_constants.ll | 65 ; CHECK-NEXT: vsubuwm 2, 2, 3
|
| H A D | vec_clz.ll | 91 ; CHECK-NEXT: vsubuwm 3, 2, 3
99 ; CHECK-NOVSX-NEXT: vsubuwm 3, 2, 3
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrAltivec.td | 658 "vsubuwm $vD, $vA, $vB", IIC_VecGeneral,
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/PowerPC/ |
| H A D | vec_constants.ll | 65 ; CHECK-NEXT: vsubuwm 2, 2, 3
|
| H A D | vector-popcnt-128-ult-ugt.ll | 4208 ; PWR5-NEXT: vsubuwm 2, 2, 4
4244 ; PWR6-NEXT: vsubuwm 2, 2, 4
4282 ; PWR7-NEXT: vsubuwm 2, 2, 3
4336 ; PWR5-NEXT: vsubuwm 2, 2, 4
4373 ; PWR6-NEXT: vsubuwm 2, 2, 4
4411 ; PWR7-NEXT: vsubuwm 2, 2, 3
4467 ; PWR5-NEXT: vsubuwm 2, 2, 4
4504 ; PWR6-NEXT: vsubuwm 2, 2, 4
4542 ; PWR7-NEXT: vsubuwm 2, 2, 3
4598 ; PWR5-NEXT: vsubuwm 2, 2, 4
[all …]
|
| H A D | vector-rotates.ll | 83 ; CHECK-P8-NEXT: vsubuwm v3, v4, v3
91 ; CHECK-P7-NEXT: vsubuwm v3, v4, v3
|
| H A D | vselect-constants.ll | 19 ; CHECK-NEXT: vsubuwm 3, 4, 3
68 ; CHECK-NEXT: vsubuwm 2, 3, 2
82 ; CHECK-NEXT: vsubuwm 3, 4, 3
111 ; CHECK-NEXT: vsubuwm 3, 4, 3
|
| H A D | pre-inc-disable.ll | 292 ; CHECK-NEXT: vsubuwm v2, v3, v2
313 ; P9BE-NEXT: vsubuwm v2, v3, v2
|
| H A D | vec_clz.ll | 91 ; CHECK-NEXT: vsubuwm 3, 2, 3
99 ; CHECK-NOVSX-NEXT: vsubuwm 3, 2, 3
|
| H A D | mul-const-vector.ll | 209 ; CHECK-NEXT: vsubuwm v[[REG3:[0-9]+]], v[[REG2]], v2
222 ; CHECK-P8-NEXT: vsubuwm v{{[0-9]+}}, v[[REG3]], v[[REG2]]
235 ; CHECK-P8-NEXT: vsubuwm v{{[0-9]+}}, v[[REG4]], v[[REG3]]
246 ; CHECK-NEXT: vsubuwm v[[REG3:[0-9]+]], v2, v[[REG2]]
257 ; CHECK-NEXT: vsubuwm v[[REG4:[0-9]+]], v[[REG3]], v[[REG2]]
268 ; CHECK-NEXT: vsubuwm v[[REG4:[0-9]+]], v[[REG3]], v[[REG2]]
271 ; CHECK-NEXT: vsubuwm v[[REG6:[0-9]+]], v[[REG5]], v2
|
| H A D | neg-abs.ll | 40 ; CHECK-LE-NEXT: vsubuwm v3, v3, v2
|
| H A D | ppc64-P9-vabsd.ll | 19 ; CHECK-PWR8: vsubuwm
24 ; CHECK-PWR7: vsubuwm
42 ; CHECK-PWR8: vsubuwm
127 ; CHECK-NOT: vsubuwm
135 ; CHECK-PWR8-DAG: vsubuwm
140 ; CHECK-PWR7-DAG: vsubuwm
225 ; CHECK-PWR8-DAG: vsubuwm
416 ; CHECK-NOT: vsubuwm
425 ; CHECK-PWR8-DAG: vsubuwm
|