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Searched refs:XRA_MASK (Results 1 – 25 of 42) sorted by relevance

12

/dports/editors/hte/ht-e9e63373148da5d7df397d8075740d8c096ecb1d/asm/
H A Dppcopc.cc1014 #define XRA_MASK (X_MASK | RA_MASK) macro
2426 { "mtsrdin", X(31,114), XRA_MASK, PPC64, { RS, RB } },
2503 { "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } },
2600 { "slbmte", X(31,402), XRA_MASK, PPC64, { RS, RB } },
2733 { "mfsrin", X(31,659), XRA_MASK, PPC32, { RT, RB } },
2773 { "slbmfev", X(31,851), XRA_MASK, PPC64, { RT, RB } },
2783 { "slbmfee", X(31,915), XRA_MASK, PPC64, { RT, RB } },
3013 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
3014 { "frsp.", XRC(63,12,1), XRA_MASK, COM, { FRT, FRB } },
3060 { "fneg", XRC(63,40,0), XRA_MASK, COM, { FRT, FRB } },
[all …]
/dports/lang/smalltalk/smalltalk-3.2.5/opcode/
H A Dppc-opc.c1076 #define XRA_MASK (X_MASK | RA_MASK) macro
2243 { "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } },
2244 { "mtsri", X(31,242), XRA_MASK, POWER32, { RS, RB } },
2480 { "mfsrin", X(31,659), XRA_MASK, PPC32, { RT, RB } },
2675 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
2676 { "frsp.", XRC(63,12,1), XRA_MASK, COM, { FRT, FRB } },
2744 { "fneg", XRC(63,40,0), XRA_MASK, COM, { FRT, FRB } },
2745 { "fneg.", XRC(63,40,1), XRA_MASK, COM, { FRT, FRB } },
2752 { "fmr", XRC(63,72,0), XRA_MASK, COM, { FRT, FRB } },
2753 { "fmr.", XRC(63,72,1), XRA_MASK, COM, { FRT, FRB } },
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/opcodes/
H A Dppc-opc.c1669 #define XRA_MASK (X_MASK | RA_MASK) macro
1672 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3625 {"mtsrdin", X(31,114), XRA_MASK, PPC64, PPCNONE, {RS, RB}},
3772 {"mtsrin", X(31,242), XRA_MASK, PPC, NON32, {RS, RB}},
3773 {"mtsri", X(31,242), XRA_MASK, POWER, NON32, {RS, RB}},
4125 {"slbmte", X(31,402), XRA_MASK, PPC64, PPCNONE, {RS, RB}},
4517 {"mfsrin", X(31,659), XRA_MASK, PPC, NON32, {RT, RB}},
4668 {"slbmfev", X(31,851), XRA_MASK, PPC64, PPCNONE, {RT, RB}},
4702 {"slbmfee", X(31,915), XRA_MASK, PPC64, PPCNONE, {RT, RB}},
5154 {"frsp", XRC(63,12,0), XRA_MASK, COM, PPCEFS, {FRT, FRB}},
[all …]
/dports/games/iortcw/iortcw-1.51c/MP/code/qcommon/
H A Dvm_powerpc_asm.c698 #define XRA_MASK (X_MASK | RA_MASK) macro
701 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
999 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
1000 { "fctiwz", XRC(63,15,0), XRA_MASK, PPCCOM, { FRT, FRB } },
1002 { "fneg", XRC(63,40,0), XRA_MASK, COM, { FRT, FRB } },
/dports/games/ioquake3/ioquake3-1.36/code/qcommon/
H A Dvm_powerpc_asm.c701 #define XRA_MASK (X_MASK | RA_MASK) macro
704 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
1002 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
1003 { "fctiwz", XRC(63,15,0), XRA_MASK, PPCCOM, { FRT, FRB } },
1005 { "fneg", XRC(63,40,0), XRA_MASK, COM, { FRT, FRB } },
/dports/games/ioquake3-server/ioquake3-1.36/code/qcommon/
H A Dvm_powerpc_asm.c701 #define XRA_MASK (X_MASK | RA_MASK) macro
704 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
1002 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
1003 { "fctiwz", XRC(63,15,0), XRA_MASK, PPCCOM, { FRT, FRB } },
1005 { "fneg", XRC(63,40,0), XRA_MASK, COM, { FRT, FRB } },
/dports/games/iortcw/iortcw-1.51c/SP/code/qcommon/
H A Dvm_powerpc_asm.c698 #define XRA_MASK (X_MASK | RA_MASK) macro
701 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
999 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
1000 { "fctiwz", XRC(63,15,0), XRA_MASK, PPCCOM, { FRT, FRB } },
1002 { "fneg", XRC(63,40,0), XRA_MASK, COM, { FRT, FRB } },
/dports/games/openarena/openarena-engine-source-0.8.8/code/qcommon/
H A Dvm_powerpc_asm.c700 #define XRA_MASK (X_MASK | RA_MASK) macro
703 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
1001 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
1002 { "fctiwz", XRC(63,15,0), XRA_MASK, PPCCOM, { FRT, FRB } },
1004 { "fneg", XRC(63,40,0), XRA_MASK, COM, { FRT, FRB } },
/dports/games/openarena-server/openarena-engine-source-0.8.8/code/qcommon/
H A Dvm_powerpc_asm.c700 #define XRA_MASK (X_MASK | RA_MASK) macro
703 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
1001 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
1002 { "fctiwz", XRC(63,15,0), XRA_MASK, PPCCOM, { FRT, FRB } },
1004 { "fneg", XRC(63,40,0), XRA_MASK, COM, { FRT, FRB } },
/dports/devel/gdb761/gdb-7.6.1/opcodes/
H A Dppc-opc.c2415 #define XRA_MASK (X_MASK | RA_MASK) macro
2418 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
4425 {"mtsrdin", X(31,114), XRA_MASK, PPC64, PPCNONE, {RS, RB}},
4574 {"mtsrin", X(31,242), XRA_MASK, PPC, NON32, {RS, RB}},
4575 {"mtsri", X(31,242), XRA_MASK, POWER, NON32, {RS, RB}},
4941 {"slbmte", X(31,402), XRA_MASK, PPC64, PPCNONE, {RS, RB}},
5358 {"mfsrin", X(31,659), XRA_MASK, PPC, NON32, {RT, RB}},
5536 {"slbmfev", X(31,851), XRA_MASK, PPC64, PPCNONE, {RT, RB}},
5576 {"slbmfee", X(31,915), XRA_MASK, PPC64, PPCNONE, {RT, RB}},
6038 {"frsp", XRC(63,12,0), XRA_MASK, COM, PPCEFS, {FRT, FRB}},
[all …]
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/
H A Dppc-opc.c2726 #define XRA_MASK (X_MASK | RA_MASK) macro
2727 #define XVA_MASK XRA_MASK
2730 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3230 {"ps_neg", XRC(4, 40,0), XRA_MASK, PPCPS, 0, {FRT, FRB}},
3249 {"ps_mr", XRC(4, 72,0), XRA_MASK, PPCPS, 0, {FRT, FRB}},
4925 {"mtsrdin", X(31,114), XRA_MASK, PPC64, 0, {RS, RB}},
5107 {"mtsrin", X(31,242), XRA_MASK, PPC, NON32, {RS, RB}},
5108 {"mtsri", X(31,242), XRA_MASK, POWER, NON32, {RS, RB}},
5509 {"slbmte", X(31,402), XRA_MASK, PPC64, 0, {RS, RB}},
5615 {"slbieg", X(31,466), XRA_MASK, POWER9, 0, {RS, RB}},
[all …]
/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/
H A Dppc-opc.c2726 #define XRA_MASK (X_MASK | RA_MASK) macro
2727 #define XVA_MASK XRA_MASK
2730 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3230 {"ps_neg", XRC(4, 40,0), XRA_MASK, PPCPS, 0, {FRT, FRB}},
3249 {"ps_mr", XRC(4, 72,0), XRA_MASK, PPCPS, 0, {FRT, FRB}},
4925 {"mtsrdin", X(31,114), XRA_MASK, PPC64, 0, {RS, RB}},
5107 {"mtsrin", X(31,242), XRA_MASK, PPC, NON32, {RS, RB}},
5108 {"mtsri", X(31,242), XRA_MASK, POWER, NON32, {RS, RB}},
5509 {"slbmte", X(31,402), XRA_MASK, PPC64, 0, {RS, RB}},
5615 {"slbieg", X(31,466), XRA_MASK, POWER9, 0, {RS, RB}},
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/powerpc/xmon/
H A Dppc-opc.c2674 #define XRA_MASK (X_MASK | RA_MASK) macro
2675 #define XVA_MASK XRA_MASK
2678 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3176 {"ps_neg", XRC(4, 40,0), XRA_MASK, PPCPS, 0, {FRT, FRB}},
3195 {"ps_mr", XRC(4, 72,0), XRA_MASK, PPCPS, 0, {FRT, FRB}},
4871 {"mtsrdin", X(31,114), XRA_MASK, PPC64, 0, {RS, RB}},
5045 {"mtsrin", X(31,242), XRA_MASK, PPC, NON32, {RS, RB}},
5046 {"mtsri", X(31,242), XRA_MASK, POWER, NON32, {RS, RB}},
5447 {"slbmte", X(31,402), XRA_MASK, PPC64, 0, {RS, RB}},
5551 {"slbieg", X(31,466), XRA_MASK, POWER9, 0, {RS, RB}},
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/powerpc/xmon/
H A Dppc-opc.c2674 #define XRA_MASK (X_MASK | RA_MASK) macro
2675 #define XVA_MASK XRA_MASK
2678 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3176 {"ps_neg", XRC(4, 40,0), XRA_MASK, PPCPS, 0, {FRT, FRB}},
3195 {"ps_mr", XRC(4, 72,0), XRA_MASK, PPCPS, 0, {FRT, FRB}},
4871 {"mtsrdin", X(31,114), XRA_MASK, PPC64, 0, {RS, RB}},
5045 {"mtsrin", X(31,242), XRA_MASK, PPC, NON32, {RS, RB}},
5046 {"mtsri", X(31,242), XRA_MASK, POWER, NON32, {RS, RB}},
5447 {"slbmte", X(31,402), XRA_MASK, PPC64, 0, {RS, RB}},
5551 {"slbieg", X(31,466), XRA_MASK, POWER9, 0, {RS, RB}},
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/arch/powerpc/xmon/
H A Dppc-opc.c2674 #define XRA_MASK (X_MASK | RA_MASK) macro
2675 #define XVA_MASK XRA_MASK
2678 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3176 {"ps_neg", XRC(4, 40,0), XRA_MASK, PPCPS, 0, {FRT, FRB}},
3195 {"ps_mr", XRC(4, 72,0), XRA_MASK, PPCPS, 0, {FRT, FRB}},
4871 {"mtsrdin", X(31,114), XRA_MASK, PPC64, 0, {RS, RB}},
5045 {"mtsrin", X(31,242), XRA_MASK, PPC, NON32, {RS, RB}},
5046 {"mtsri", X(31,242), XRA_MASK, POWER, NON32, {RS, RB}},
5447 {"slbmte", X(31,402), XRA_MASK, PPC64, 0, {RS, RB}},
5551 {"slbieg", X(31,466), XRA_MASK, POWER9, 0, {RS, RB}},
[all …]
/dports/devel/radare2/radare2-5.1.1/libr/asm/arch/ppc/gnu/
H A Dppc-opc.c1604 #define XRA_MASK (X_MASK | RA_MASK) macro
3563 {"mtsrdin", X(31,114), XRA_MASK, PPC64, {RS, RB}},
3707 {"mtsrin", X(31,242), XRA_MASK, PPC32, {RS, RB}},
3708 {"mtsri", X(31,242), XRA_MASK, POWER32, {RS, RB}},
4041 {"slbmte", X(31,402), XRA_MASK, PPC64, {RS, RB}},
4434 {"mfsrin", X(31,659), XRA_MASK, PPC32, {RT, RB}},
4594 {"slbmfev", X(31,851), XRA_MASK, PPC64, {RT, RB}},
4625 {"slbmfee", X(31,915), XRA_MASK, PPC64, {RT, RB}},
4970 {"frsp", XRC(63,12,0), XRA_MASK, COM, {FRT, FRB}},
5046 {"fneg", XRC(63,40,0), XRA_MASK, COM, {FRT, FRB}},
[all …]
/dports/devel/djgpp-binutils/binutils-2.17/opcodes/
H A Dppc-opc.c1629 #define XRA_MASK (X_MASK | RA_MASK) macro
3440 { "mtsrdin", X(31,114), XRA_MASK, PPC64, { RS, RB } },
3588 { "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } },
3589 { "mtsri", X(31,242), XRA_MASK, POWER32, { RS, RB } },
3923 { "slbmte", X(31,402), XRA_MASK, PPC64, { RS, RB } },
4266 { "mfsrin", X(31,659), XRA_MASK, PPC32, { RT, RB } },
4345 { "slbmfev", X(31,851), XRA_MASK, PPC64, { RT, RB } },
4355 { "slbmfee", X(31,915), XRA_MASK, PPC64, { RT, RB } },
4565 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
4566 { "frsp.", XRC(63,12,1), XRA_MASK, COM, { FRT, FRB } },
[all …]
/dports/emulators/qemu/qemu-6.2.0/disas/
H A Dppc.c1751 #define XRA_MASK (X_MASK | RA_MASK) macro
1754 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3591 { "mtsrdin", X(31,114), XRA_MASK, PPC64, { RS, RB } },
3752 { "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } },
3753 { "mtsri", X(31,242), XRA_MASK, POWER32, { RS, RB } },
4088 { "slbmte", X(31,402), XRA_MASK, PPC64, { RS, RB } },
4449 { "mfsrin", X(31,659), XRA_MASK, PPC32, { RT, RB } },
4536 { "slbmfev", X(31,851), XRA_MASK, PPC64, { RT, RB } },
4552 { "slbmfee", X(31,915), XRA_MASK, PPC64, { RT, RB } },
4860 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
[all …]
/dports/emulators/qemu42/qemu-4.2.1/disas/
H A Dppc.c1751 #define XRA_MASK (X_MASK | RA_MASK) macro
1754 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3591 { "mtsrdin", X(31,114), XRA_MASK, PPC64, { RS, RB } },
3752 { "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } },
3753 { "mtsri", X(31,242), XRA_MASK, POWER32, { RS, RB } },
4088 { "slbmte", X(31,402), XRA_MASK, PPC64, { RS, RB } },
4449 { "mfsrin", X(31,659), XRA_MASK, PPC32, { RT, RB } },
4536 { "slbmfev", X(31,851), XRA_MASK, PPC64, { RT, RB } },
4552 { "slbmfee", X(31,915), XRA_MASK, PPC64, { RT, RB } },
4860 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
[all …]
/dports/emulators/qemu5/qemu-5.2.0/disas/
H A Dppc.c1751 #define XRA_MASK (X_MASK | RA_MASK) macro
1754 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3591 { "mtsrdin", X(31,114), XRA_MASK, PPC64, { RS, RB } },
3752 { "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } },
3753 { "mtsri", X(31,242), XRA_MASK, POWER32, { RS, RB } },
4088 { "slbmte", X(31,402), XRA_MASK, PPC64, { RS, RB } },
4449 { "mfsrin", X(31,659), XRA_MASK, PPC32, { RT, RB } },
4536 { "slbmfev", X(31,851), XRA_MASK, PPC64, { RT, RB } },
4552 { "slbmfee", X(31,915), XRA_MASK, PPC64, { RT, RB } },
4860 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
[all …]
/dports/emulators/qemu60/qemu-6.0.0/disas/
H A Dppc.c1751 #define XRA_MASK (X_MASK | RA_MASK) macro
1754 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3591 { "mtsrdin", X(31,114), XRA_MASK, PPC64, { RS, RB } },
3752 { "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } },
3753 { "mtsri", X(31,242), XRA_MASK, POWER32, { RS, RB } },
4088 { "slbmte", X(31,402), XRA_MASK, PPC64, { RS, RB } },
4449 { "mfsrin", X(31,659), XRA_MASK, PPC32, { RT, RB } },
4536 { "slbmfev", X(31,851), XRA_MASK, PPC64, { RT, RB } },
4552 { "slbmfee", X(31,915), XRA_MASK, PPC64, { RT, RB } },
4860 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/disas/
H A Dppc.c1751 #define XRA_MASK (X_MASK | RA_MASK) macro
1754 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3591 { "mtsrdin", X(31,114), XRA_MASK, PPC64, { RS, RB } },
3752 { "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } },
3753 { "mtsri", X(31,242), XRA_MASK, POWER32, { RS, RB } },
4088 { "slbmte", X(31,402), XRA_MASK, PPC64, { RS, RB } },
4449 { "mfsrin", X(31,659), XRA_MASK, PPC32, { RT, RB } },
4536 { "slbmfev", X(31,851), XRA_MASK, PPC64, { RT, RB } },
4552 { "slbmfee", X(31,915), XRA_MASK, PPC64, { RT, RB } },
4860 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
[all …]
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/disas/
H A Dppc.c1751 #define XRA_MASK (X_MASK | RA_MASK) macro
1754 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3591 { "mtsrdin", X(31,114), XRA_MASK, PPC64, { RS, RB } },
3752 { "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } },
3753 { "mtsri", X(31,242), XRA_MASK, POWER32, { RS, RB } },
4088 { "slbmte", X(31,402), XRA_MASK, PPC64, { RS, RB } },
4449 { "mfsrin", X(31,659), XRA_MASK, PPC32, { RT, RB } },
4536 { "slbmfev", X(31,851), XRA_MASK, PPC64, { RT, RB } },
4552 { "slbmfee", X(31,915), XRA_MASK, PPC64, { RT, RB } },
4860 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/disas/
H A Dppc.c1751 #define XRA_MASK (X_MASK | RA_MASK) macro
1754 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3591 { "mtsrdin", X(31,114), XRA_MASK, PPC64, { RS, RB } },
3752 { "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } },
3753 { "mtsri", X(31,242), XRA_MASK, POWER32, { RS, RB } },
4088 { "slbmte", X(31,402), XRA_MASK, PPC64, { RS, RB } },
4449 { "mfsrin", X(31,659), XRA_MASK, PPC32, { RT, RB } },
4536 { "slbmfev", X(31,851), XRA_MASK, PPC64, { RT, RB } },
4552 { "slbmfee", X(31,915), XRA_MASK, PPC64, { RT, RB } },
4860 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/disas/
H A Dppc.c1751 #define XRA_MASK (X_MASK | RA_MASK) macro
1754 #define XWRA_MASK (XRA_MASK & ~((unsigned long) 1 << 16))
3591 { "mtsrdin", X(31,114), XRA_MASK, PPC64, { RS, RB } },
3752 { "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } },
3753 { "mtsri", X(31,242), XRA_MASK, POWER32, { RS, RB } },
4088 { "slbmte", X(31,402), XRA_MASK, PPC64, { RS, RB } },
4449 { "mfsrin", X(31,659), XRA_MASK, PPC32, { RT, RB } },
4536 { "slbmfev", X(31,851), XRA_MASK, PPC64, { RT, RB } },
4552 { "slbmfee", X(31,915), XRA_MASK, PPC64, { RT, RB } },
4860 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
[all …]

12