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Searched refs:vddci_control (Results 1 – 21 of 21) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
H A Dvegam_smumgr.c483 if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) { in vegam_populate_smc_vddci_table()
619 if (SMU7_VOLTAGE_CONTROL_NONE == data->vddci_control) in vegam_get_dependency_volt_by_clk()
647 if (SMU7_VOLTAGE_CONTROL_NONE == data->vddci_control) in vegam_get_dependency_volt_by_clk()
1227 if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) in vegam_populate_smc_vce_level()
1230 else if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) in vegam_populate_smc_vce_level()
1341 if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) in vegam_populate_smc_uvd_level()
1344 else if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) in vegam_populate_smc_uvd_level()
1697 if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) { in vegam_populate_vr_config()
1700 } else if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) { in vegam_populate_vr_config()
H A Dpolaris10_smumgr.c370 if (SMU7_VOLTAGE_CONTROL_NONE == data->vddci_control) in polaris10_get_dependency_volt_by_clk()
398 if (SMU7_VOLTAGE_CONTROL_NONE == data->vddci_control) in polaris10_get_dependency_volt_by_clk()
680 if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) { in polaris10_populate_smc_vddci_table()
1306 if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) in polaris10_populate_smc_vce_level()
1309 else if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) in polaris10_populate_smc_vce_level()
1413 if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) in polaris10_populate_smc_uvd_level()
1416 else if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) in polaris10_populate_smc_uvd_level()
1613 if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) { in polaris10_populate_vr_config()
1616 } else if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) { in polaris10_populate_vr_config()
H A Diceland_smumgr.c657 if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) in iceland_populate_smc_vdd_ci_table()
1247 if (data->vddci_control == SMU7_VOLTAGE_CONTROL_NONE) { in iceland_populate_single_memory_level()
1494 if (SMU7_VOLTAGE_CONTROL_NONE == data->vddci_control) in iceland_populate_smc_acpi_level()
1677 if (SMU7_VOLTAGE_CONTROL_NONE == data->vddci_control) in iceland_populate_smc_boot_level()
1914 if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) in iceland_populate_smc_svi2_config()
H A Dfiji_smumgr.c383 if (SMU7_VOLTAGE_CONTROL_NONE == data->vddci_control) in fiji_get_dependency_volt_by_clk()
411 if (SMU7_VOLTAGE_CONTROL_NONE == data->vddci_control) in fiji_get_dependency_volt_by_clk()
1851 if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) { in fiji_populate_vr_config()
1854 } else if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) { in fiji_populate_vr_config()
H A Dci_smumgr.c882 if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) { in ci_populate_smc_vdd_ci_table()
1446 if (SMU7_VOLTAGE_CONTROL_NONE == data->vddci_control) in ci_populate_smc_acpi_level()
1923 if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) { in ci_populate_vr_config()
1926 } else if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) { in ci_populate_vr_config()
H A Dtonga_smumgr.c334 if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) { in tonga_populate_smc_vdd_ci_table()
337 } else if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) { in tonga_populate_smc_vdd_ci_table()
1770 if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) { in tonga_populate_vr_config()
1773 } else if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) { in tonga_populate_vr_config()
/dragonfly/sys/dev/drm/radeon/
H A Dcypress_dpm.h65 bool vddci_control; member
H A Dci_dpm.h197 u32 vddci_control; member
H A Dcypress_dpm.c748 if (eg_pi->vddci_control) { in cypress_convert_power_level_to_smc()
1287 if (eg_pi->vddci_control) in cypress_populate_smc_initial_state()
1383 if (eg_pi->vddci_control) { in cypress_populate_smc_acpi_state()
1497 if (eg_pi->vddci_control) { in cypress_construct_voltage_tables()
2077 eg_pi->vddci_control = in cypress_dpm_init()
H A Dci_dpm.c2191 if (pi->vddci_control == CISLANDS_VOLTAGE_CONTROL_BY_GPIO) { in ci_construct_voltage_tables()
2197 } else if (pi->vddci_control == CISLANDS_VOLTAGE_CONTROL_BY_SVID2) { in ci_construct_voltage_tables()
2287 if (pi->vddci_control == CISLANDS_VOLTAGE_CONTROL_BY_GPIO) in ci_populate_smc_vddci_table()
3086 if (pi->vddci_control != CISLANDS_VOLTAGE_CONTROL_NONE) { in ci_populate_smc_acpi_level()
5892 pi->vddci_control = CISLANDS_VOLTAGE_CONTROL_NONE; in ci_dpm_init()
5901 pi->vddci_control = CISLANDS_VOLTAGE_CONTROL_BY_GPIO; in ci_dpm_init()
5903 pi->vddci_control = CISLANDS_VOLTAGE_CONTROL_BY_SVID2; in ci_dpm_init()
H A Dni_dpm.c1743 if (eg_pi->vddci_control) in ni_populate_smc_initial_state()
1856 if (eg_pi->vddci_control) in ni_populate_smc_acpi_state()
2376 if (eg_pi->vddci_control) { in ni_convert_power_level_to_smc()
4141 eg_pi->vddci_control = in ni_dpm_init()
H A Dsi_dpm.c3983 if (eg_pi->vddci_control) { in si_construct_voltage_tables()
4434 if (eg_pi->vddci_control) in si_populate_smc_initial_state()
5059 if (eg_pi->vddci_control) { in si_convert_power_level_to_smc()
7000 eg_pi->vddci_control = in si_dpm_init()
7003 if (!eg_pi->vddci_control) in si_dpm_init()
H A Dbtc_dpm.c2636 eg_pi->vddci_control = in btc_dpm_init()
/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dsmu7_hwmgr.h248 uint32_t vddci_control; member
H A Dvega10_hwmgr.h322 uint32_t vddci_control; member
H A Dvega12_hwmgr.h326 uint32_t vddci_control; member
H A Dsmu7_hwmgr.c276 if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) { in smu7_construct_voltage_tables()
283 } else if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) { in smu7_construct_voltage_tables()
1579 data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE; in smu7_init_dpm_defaults()
1654 data->vddci_control = SMU7_VOLTAGE_CONTROL_BY_GPIO; in smu7_init_dpm_defaults()
1657 data->vddci_control = SMU7_VOLTAGE_CONTROL_BY_SVID2; in smu7_init_dpm_defaults()
1664 if (data->vddci_control == SMU7_VOLTAGE_CONTROL_NONE) in smu7_init_dpm_defaults()
H A Dvega10_hwmgr.c189 if (data->vddci_control == VEGA10_VOLTAGE_CONTROL_NONE) in vega10_set_features_platform_caps()
819 data->vddci_control = VEGA10_VOLTAGE_CONTROL_NONE; in vega10_hwmgr_backend_init()
856 data->vddci_control = VEGA10_VOLTAGE_CONTROL_BY_GPIO; in vega10_hwmgr_backend_init()
1146 if (data->vddci_control == VEGA10_VOLTAGE_CONTROL_NONE) { in vega10_construct_voltage_tables()
H A Dvega12_hwmgr.c136 if (data->vddci_control == VEGA12_VOLTAGE_CONTROL_NONE) in vega12_set_features_platform_caps()
390 data->vddci_control = VEGA12_VOLTAGE_CONTROL_NONE; in vega12_hwmgr_backend_init()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsi_dpm.h649 bool vddci_control; member
H A Dsi_dpm.c4446 if (eg_pi->vddci_control) { in si_construct_voltage_tables()
4899 if (eg_pi->vddci_control) in si_populate_smc_initial_state()
5522 if (eg_pi->vddci_control) { in si_convert_power_level_to_smc()
7405 eg_pi->vddci_control = in si_dpm_init()
7408 if (!eg_pi->vddci_control) in si_dpm_init()