Home
last modified time | relevance | path

Searched refs:cpu_reg (Results 1 – 25 of 151) sorted by path

1234567

/dports/devel/systemc/systemc-2.3.4_pub_rev_20190614/examples/sysc/risc_cpu/
H A Ddecode.cpp71 cpu_reg[destreg_write_src.read()] = alu_dataout.read(); in entry()
79 cpu_reg[dram_write_src.read()] = dram_dataout.read(); in entry()
87 cpu_reg[fpu_destout.read()] = fpu_dout.read(); in entry()
118 srcA_tmp = cpu_reg[regA_tmp]; in entry()
119 srcB_tmp = cpu_reg[regB_tmp]; in entry()
120 srcC_tmp = cpu_reg[regC_tmp]; in entry()
145 printf(" R%2d(%08x) ",i, cpu_reg[i]); in entry()
724 cpu_reg[i] = 0; in entry()
H A Ddecode.h81 signed int cpu_reg[32]; //CPU register member
95 cpu_reg[size] = mem_word; in SC_CTOR()
/dports/devel/z80-asm/z80-asm-2.3/doc/
H A Dz80-decoder.c4 byte cpu_reg[20]; variable
29 prirntf("%2s=%02x ",name,cpu_reg[i]); in dump_reg()
197 { cpu_reg[6] = fetch_next_byte(); in decode()
H A Dz80-decoder.h12 #define X (cpu_reg+6)
15 #define reg8(r) ( (r)==6 ? memory+ *HL: cpu_reg+((r)>=7?asw:bsw)+(r) )
19 #define reg16(r) ((r) != 3 ? (word*)(cpu_reg+bsw+2*(r)) : &SP)
20 #define reg88(r) (word*)(cpu_reg+(r==3?asw:bsw)+2*(r)+(r==3))
21 #define I (cpu_reg+18)
22 #define R (cpu_reg+19)
/dports/emulators/dps8m/dps8m-572f79bb4f0f84a8b16c3892c894c2b9ed64b458/src/dps8/
H A Ddps8_cpu.c1508 static REG cpu_reg[] = variable
1523 REG *sim_PC = & cpu_reg[0];
1531 cpu_reg, // registers
/dports/emulators/emu64/emu64-5.0.19/src/
H A Ddebugger_window.cpp446 REG_STRUCT cpu_reg; in onSr_widget_ValueChange() local
447 cpu_reg.reg_mask = REG_MASK_SR; in onSr_widget_ValueChange()
448 cpu_reg.sr = value; in onSr_widget_ValueChange()
505 REG_STRUCT cpu_reg; in on_EingabeFeld_returnPressed() local
510 cpu_reg.reg_mask = REG_MASK_PC; in on_EingabeFeld_returnPressed()
511 cpu_reg.pc = value; in on_EingabeFeld_returnPressed()
520 cpu_reg.reg_mask = REG_MASK_SP; in on_EingabeFeld_returnPressed()
529 cpu_reg.reg_mask = REG_MASK_AC; in on_EingabeFeld_returnPressed()
538 cpu_reg.reg_mask = REG_MASK_XR; in on_EingabeFeld_returnPressed()
547 cpu_reg.reg_mask = REG_MASK_YR; in on_EingabeFeld_returnPressed()
[all …]
/dports/emulators/pcem/pcem_emulator-pcem-faf5d6423060/src/
H A D386.c176 #define fetch_ea_16(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >>…
177 #define fetch_ea_32(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >>…
H A D386_dynarec.c184 #define fetch_ea_16(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >>…
185 #define fetch_ea_32(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >>…
H A D808x.c1160 temp+=getr8(cpu_reg); in execx86()
1176 setr8(cpu_reg,getr8(cpu_reg)+temp); in execx86()
1216 temp|=getr8(cpu_reg); in execx86()
1237 setr8(cpu_reg,temp); in execx86()
1298 setr8(cpu_reg,getr8(cpu_reg)+temp+tempc); in execx86()
1360 setr8(cpu_reg,getr8(cpu_reg)-(temp+tempc)); in execx86()
1425 setr8(cpu_reg,temp); in execx86()
1501 setr8(cpu_reg,getr8(cpu_reg)-temp); in execx86()
1577 setr8(cpu_reg,temp); in execx86()
2031 setr8(cpu_reg,temp); in execx86()
[all …]
H A Dcodegen_x86-64.c1180 cpu_reg = (fetchdat >> 3) & 7; in codegen_generate_call()
1186 addlong(cpu_rm | (cpu_mod << 8) | (cpu_reg << 16)); in codegen_generate_call()
H A Dcodegen_x86.c2113 cpu_reg = (fetchdat >> 3) & 7; in codegen_generate_call()
2119 addlong(cpu_rm | (cpu_mod << 8) | (cpu_reg << 16)); in codegen_generate_call()
H A Dibm.h332 #define cpu_reg cpu_state.rm_data.rm_mod_reg.reg macro
H A Dx86_ops_arith.h279 setsub8(dst, getr8(cpu_reg)); in opCMP_b_rmw_a16()
290 setsub8(dst, getr8(cpu_reg)); in opCMP_b_rmw_a32()
302 setsub16(dst, cpu_state.regs[cpu_reg].w); in opCMP_w_rmw_a16()
348 setsub8(getr8(cpu_reg), src); in opCMP_b_rm_a16()
358 setsub8(getr8(cpu_reg), src); in opCMP_b_rm_a32()
438 temp2 = getr8(cpu_reg); in opTEST_b_a16()
450 temp2 = getr8(cpu_reg); in opTEST_b_a32()
463 temp2 = cpu_state.regs[cpu_reg].w; in opTEST_w_a16()
475 temp2 = cpu_state.regs[cpu_reg].w; in opTEST_w_a32()
488 temp2 = cpu_state.regs[cpu_reg].l; in opTEST_l_a16()
[all …]
H A Dx86_ops_atomic.h12 if (AL == temp) seteab(getr8(cpu_reg)); in opCMPXCHG_b_a16()
30 if (AL == temp) seteab(getr8(cpu_reg)); in opCMPXCHG_b_a32()
187 setadd8(temp, getr8(cpu_reg)); in opXADD_b_a16()
188 setr8(cpu_reg, temp); in opXADD_b_a16()
204 setadd8(temp, getr8(cpu_reg)); in opXADD_b_a32()
205 setr8(cpu_reg, temp); in opXADD_b_a32()
222 setadd16(temp, cpu_state.regs[cpu_reg].w); in opXADD_w_a16()
223 cpu_state.regs[cpu_reg].w = temp; in opXADD_w_a16()
240 cpu_state.regs[cpu_reg].w = temp; in opXADD_w_a32()
258 cpu_state.regs[cpu_reg].l = temp; in opXADD_l_a16()
[all …]
H A Dx86_ops_bit.h6 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0; in opBT_w_r_a16()
9 if (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) flags |= C_FLAG; in opBT_w_r_a16()
21 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0; in opBT_w_r_a32()
24 if (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) flags |= C_FLAG; in opBT_w_r_a32()
36 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0; in opBT_l_r_a16()
39 if (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) flags |= C_FLAG; in opBT_l_r_a16()
51 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0; in opBT_l_r_a32()
54 if (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) flags |= C_FLAG; in opBT_l_r_a32()
71 tempc = (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) ? 1 : 0; \
72 temp operation (1 << (cpu_state.regs[cpu_reg].w & 15)); \
[all …]
H A Dx86_ops_bitscan.h30 BS_common(0, 16, 1, cpu_state.regs[cpu_reg].w, (is486) ? 1 : 3); in opBSF_w_a16()
45 BS_common(0, 16, 1, cpu_state.regs[cpu_reg].w, (is486) ? 1 : 3); in opBSF_w_a32()
60 BS_common(0, 32, 1, cpu_state.regs[cpu_reg].l, (is486) ? 1 : 3); in opBSF_l_a16()
75 BS_common(0, 32, 1, cpu_state.regs[cpu_reg].l, (is486) ? 1 : 3); in opBSF_l_a32()
91 BS_common(15, -1, -1, cpu_state.regs[cpu_reg].w, 3); in opBSR_w_a16()
106 BS_common(15, -1, -1, cpu_state.regs[cpu_reg].w, 3); in opBSR_w_a32()
121 BS_common(31, -1, -1, cpu_state.regs[cpu_reg].l, 3); in opBSR_l_a16()
136 BS_common(31, -1, -1, cpu_state.regs[cpu_reg].l, 3); in opBSR_l_a32()
H A Dx86_ops_misc.h631 … if (((int16_t)cpu_state.regs[cpu_reg].w < low) || ((int16_t)cpu_state.regs[cpu_reg].w > high)) in opBOUND_w_a16()
650 … if (((int16_t)cpu_state.regs[cpu_reg].w < low) || ((int16_t)cpu_state.regs[cpu_reg].w > high)) in opBOUND_w_a32()
670 … if (((int32_t)cpu_state.regs[cpu_reg].l < low) || ((int32_t)cpu_state.regs[cpu_reg].l > high)) in opBOUND_l_a16()
689 … if (((int32_t)cpu_state.regs[cpu_reg].l < low) || ((int32_t)cpu_state.regs[cpu_reg].l > high)) in opBOUND_l_a32()
H A Dx86_ops_mmx_arith.h145 cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] + src.b[0]); in opPADDUSB_a16()
146 cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] + src.b[1]); in opPADDUSB_a16()
147 cpu_state.MM[cpu_reg].b[2] = USATB(cpu_state.MM[cpu_reg].b[2] + src.b[2]); in opPADDUSB_a16()
148 cpu_state.MM[cpu_reg].b[3] = USATB(cpu_state.MM[cpu_reg].b[3] + src.b[3]); in opPADDUSB_a16()
149 cpu_state.MM[cpu_reg].b[4] = USATB(cpu_state.MM[cpu_reg].b[4] + src.b[4]); in opPADDUSB_a16()
150 cpu_state.MM[cpu_reg].b[5] = USATB(cpu_state.MM[cpu_reg].b[5] + src.b[5]); in opPADDUSB_a16()
151 cpu_state.MM[cpu_reg].b[6] = USATB(cpu_state.MM[cpu_reg].b[6] + src.b[6]); in opPADDUSB_a16()
152 cpu_state.MM[cpu_reg].b[7] = USATB(cpu_state.MM[cpu_reg].b[7] + src.b[7]); in opPADDUSB_a16()
164 cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] + src.b[0]); in opPADDUSB_a32()
165 cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] + src.b[1]); in opPADDUSB_a32()
[all …]
H A Dx86_ops_mmx_cmp.h10 cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0; in opPCMPEQB_a16()
11 cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0; in opPCMPEQB_a16()
12 cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0; in opPCMPEQB_a16()
13 cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0; in opPCMPEQB_a16()
14 cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0; in opPCMPEQB_a16()
15 cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0; in opPCMPEQB_a16()
16 cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0; in opPCMPEQB_a16()
17 cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0; in opPCMPEQB_a16()
30 cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0; in opPCMPEQB_a32()
31 cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0; in opPCMPEQB_a32()
[all …]
H A Dx86_ops_mmx_logic.h9 cpu_state.MM[cpu_reg].q &= src.q; in opPAND_a16()
20 cpu_state.MM[cpu_reg].q &= src.q; in opPAND_a32()
32 cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q; in opPANDN_a16()
43 cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q; in opPANDN_a32()
55 cpu_state.MM[cpu_reg].q |= src.q; in opPOR_a16()
66 cpu_state.MM[cpu_reg].q |= src.q; in opPOR_a32()
78 cpu_state.MM[cpu_reg].q ^= src.q; in opPXOR_a16()
89 cpu_state.MM[cpu_reg].q ^= src.q; in opPXOR_a32()
H A Dx86_ops_mmx_mov.h8 cpu_state.MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l; in opMOVD_l_mm_a16()
9 cpu_state.MM[cpu_reg].l[1] = 0; in opMOVD_l_mm_a16()
17 cpu_state.MM[cpu_reg].l[0] = dst; in opMOVD_l_mm_a16()
18 cpu_state.MM[cpu_reg].l[1] = 0; in opMOVD_l_mm_a16()
32 cpu_state.MM[cpu_reg].l[1] = 0; in opMOVD_l_mm_a32()
40 cpu_state.MM[cpu_reg].l[0] = dst; in opMOVD_l_mm_a32()
41 cpu_state.MM[cpu_reg].l[1] = 0; in opMOVD_l_mm_a32()
92 cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q; in opMOVQ_q_mm_a16()
100 cpu_state.MM[cpu_reg].q = dst; in opMOVQ_q_mm_a16()
112 cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q; in opMOVQ_q_mm_a32()
[all …]
H A Dx86_ops_mmx_pack.h52 cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1]; in opPUNPCKHDQ_a16()
65 cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1]; in opPUNPCKHDQ_a32()
80 cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3]; in opPUNPCKLBW_a16()
82 cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[2]; in opPUNPCKLBW_a16()
84 cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1]; in opPUNPCKLBW_a16()
86 cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0]; in opPUNPCKLBW_a16()
99 cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3]; in opPUNPCKLBW_a32()
101 cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[2]; in opPUNPCKLBW_a32()
103 cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1]; in opPUNPCKLBW_a32()
105 cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0]; in opPUNPCKLBW_a32()
[all …]
H A Dx86_ops_mmx_shift.h75 cpu_state.MM[cpu_reg].q = 0; in opPSLLW_a16()
96 cpu_state.MM[cpu_reg].q = 0; in opPSLLW_a32()
118 cpu_state.MM[cpu_reg].q = 0; in opPSRLW_a16()
139 cpu_state.MM[cpu_reg].q = 0; in opPSRLW_a32()
246 cpu_state.MM[cpu_reg].q = 0; in opPSLLD_a16()
265 cpu_state.MM[cpu_reg].q = 0; in opPSLLD_a32()
285 cpu_state.MM[cpu_reg].q = 0; in opPSRLD_a16()
304 cpu_state.MM[cpu_reg].q = 0; in opPSRLD_a32()
398 cpu_state.MM[cpu_reg].q = 0; in opPSLLQ_a16()
414 cpu_state.MM[cpu_reg].q = 0; in opPSLLQ_a32()
[all …]
H A Dx86_ops_mov.h431 setr8(cpu_rm, getr8(cpu_reg)); in opMOV_b_r_a16()
438 seteab(getr8(cpu_reg)); in opMOV_b_r_a16()
449 setr8(cpu_rm, getr8(cpu_reg)); in opMOV_b_r_a32()
456 seteab(getr8(cpu_reg)); in opMOV_b_r_a32()
540 setr8(cpu_reg, getr8(cpu_rm)); in opMOV_r_b_a16()
549 setr8(cpu_reg, temp); in opMOV_r_b_a16()
560 setr8(cpu_reg, getr8(cpu_rm)); in opMOV_r_b_a32()
569 setr8(cpu_reg, temp); in opMOV_r_b_a32()
589 cpu_state.regs[cpu_reg].w = temp; in opMOV_r_w_a16()
609 cpu_state.regs[cpu_reg].w = temp; in opMOV_r_w_a32()
[all …]
H A Dx86_ops_mov_ctrl.h10 switch (cpu_reg) in opMOV_r_CRx_a16()
30 pclog("Bad read of CR%i %i\n",rmdat&7,cpu_reg); in opMOV_r_CRx_a16()
48 switch (cpu_reg) in opMOV_r_CRx_a32()
87 cpu_state.regs[cpu_rm].l = dr[cpu_reg]; in opMOV_r_DRx_a16()
101 cpu_state.regs[cpu_rm].l = dr[cpu_reg]; in opMOV_r_DRx_a32()
118 switch (cpu_reg) in opMOV_CRx_r_a16()
154 pclog("Bad load CR%i\n", cpu_reg); in opMOV_CRx_r_a16()
174 switch (cpu_reg) in opMOV_CRx_r_a32()
210 pclog("Bad load CR%i\n", cpu_reg); in opMOV_CRx_r_a32()
229 dr[cpu_reg] = cpu_state.regs[cpu_rm].l; in opMOV_DRx_r_a16()
[all …]

1234567